From 9ab05c6404c02b5f2c927539b5c681b46f778b9f Mon Sep 17 00:00:00 2001 From: maksyuki Date: Fri, 23 Oct 2026 11:54:17 +0800 Subject: [PATCH] fix(ci): raise the Mini ci_smoke Verilator budget to the 3600s tier The feat/mini-hp-core merge adds the HP subsystem to the Mini Verilator model, so the ci_smoke acceptance step (which ends in the crypto self-test) exceeds the old 1800 s wall budget on hosted runners and fails with SIM_TEST_TIMEOUT. The merged content is functionally correct: the identical step passes locally with SIM_TEST_PASS code=0 in 1806 s wall (build/ihp130-2026-10-23-11-20-cff97749f2f3/). This is a validation-only budget change to the existing 3600 s tier already used by the SDRAM variant; the contract tests in tests/test_script_tools.py are updated to pin the new value. No RTL, firmware, or marker-rule change. CI failure under repair: regression-ihp130 run 39889921334. --- scripts/regress.py | 4 +++- tests/test_script_tools.py | 8 +++++++- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/scripts/regress.py b/scripts/regress.py index 6e0d5c5c..fc1d53fc 100644 --- a/scripts/regress.py +++ b/scripts/regress.py @@ -27,7 +27,9 @@ CI_SMOKE_VERILATOR_VALUES = ( CI_SMOKE_SIM_VALUES = ( CI_SMOKE_APP_VALUE, "LINK_TYPE=ld2_all_sram", - "SOC_SIM_TIME=1800", + # The merged HP subsystem roughly doubled the hosted Verilator runtime of + # this acceptance step; keep the next existing budget tier. + "SOC_SIM_TIME=3600", *CI_SMOKE_VERILATOR_VALUES, ) CI_SMOKE_SDRAM_SIM_VALUES = ( diff --git a/tests/test_script_tools.py b/tests/test_script_tools.py index 50ae1065..e960dd97 100644 --- a/tests/test_script_tools.py +++ b/tests/test_script_tools.py @@ -1318,6 +1318,12 @@ def test_verilator_simulations_use_uniform_timeout() -> None: assert "TINY_P7_ACCEPTANCE=YES" in values assert "TINY_SIM_TIMEOUT=6000000" in values assert "TINY_SIM_ARGS=+p7_monitor" in values + elif "LINK_TYPE=ld2_sdram" in values: + assert simulation_timeout == ["SOC_SIM_TIME=3600"] + elif profile == "configs/ci/ihp130.mk": + # The merged HP subsystem roughly doubled this step's + # hosted runtime; it shares the next budget tier. + assert simulation_timeout == ["SOC_SIM_TIME=3600"] else: assert simulation_timeout == ["SOC_SIM_TIME=1800"] assert "LINK_TYPE=ld2_all_sram" in values @@ -1621,7 +1627,7 @@ def test_pdk_pr_regressions_cover_firmware_rtl_and_selected_netlist_target() -> if pdk == "IHP130": assert "LINK_TYPE=ld2_all_sram" in verilator_values assert "VERILATOR_SIM_ARGS=--fast-flash" in verilator_values - assert "SOC_SIM_TIME=1800" in verilator_values + assert "SOC_SIM_TIME=3600" in verilator_values else: assert "LINK_TYPE=ld2_sdram" in verilator_values assert "VERILATOR_SIM_ARGS=--fast-flash" in verilator_values