diff --git a/README.md b/README.md
index adb10b36..1204bb59 100644
--- a/README.md
+++ b/README.md
@@ -1,19 +1,21 @@
 # retroSoC
 
-[![quality](https://github.com/retroSoC/retroSoC/actions/workflows/quality.yml/badge.svg)](https://github.com/retroSoC/retroSoC/actions/workflows/quality.yml)
-[![IHP130 regression](https://github.com/retroSoC/retroSoC/actions/workflows/regression-ihp130.yml/badge.svg)](https://github.com/retroSoC/retroSoC/actions/workflows/regression-ihp130.yml)
-[![GF180 regression](https://github.com/retroSoC/retroSoC/actions/workflows/regression-gf180.yml/badge.svg)](https://github.com/retroSoC/retroSoC/actions/workflows/regression-gf180.yml)
-[![ICS55 regression](https://github.com/retroSoC/retroSoC/actions/workflows/regression-ics55.yml/badge.svg)](https://github.com/retroSoC/retroSoC/actions/workflows/regression-ics55.yml)
-[![SKY130 regression](https://github.com/retroSoC/retroSoC/actions/workflows/regression-sky130.yml/badge.svg)](https://github.com/retroSoC/retroSoC/actions/workflows/regression-sky130.yml)
-[![nightly](https://github.com/retroSoC/retroSoC/actions/workflows/nightly.yml/badge.svg)](https://github.com/retroSoC/retroSoC/actions/workflows/nightly.yml)
+[![License](https://img.shields.io/badge/License-Mulan%20PSL%20v2-d4a72c?style=flat-square&labelColor=3b301a&logo=opensourceinitiative&logoColor=f6d365)](LICENSE)
+[![RTL](https://img.shields.io/badge/RTL-SystemVerilog-d4a72c?style=flat-square&labelColor=3b301a)](rtl)
+[![ISA](https://img.shields.io/badge/ISA-RV32IM-d4a72c?style=flat-square&labelColor=3b301a&logo=riscv&logoColor=f6d365)](configs/ci/ihp130.mk)
+[![RISC-V GCC](https://img.shields.io/badge/RISC--V%20GCC-2025.05.01-d4a72c?style=flat-square&labelColor=3b301a&logo=gnu&logoColor=f6d365)](config/dependencies.lock.json)
+[![Quality](https://img.shields.io/github/actions/workflow/status/retroSoC/retroSoC/quality.yml?branch=main&style=flat-square&label=Quality&labelColor=3b301a&logo=githubactions&logoColor=f6d365)](https://github.com/retroSoC/retroSoC/actions/workflows/quality.yml)
+[![Nightly](https://img.shields.io/github/actions/workflow/status/retroSoC/retroSoC/nightly.yml?branch=main&style=flat-square&label=Nightly&labelColor=3b301a&logo=githubactions&logoColor=f6d365)](https://github.com/retroSoC/retroSoC/actions/workflows/nightly.yml)<br>
+[![IHP130 regression](https://img.shields.io/github/actions/workflow/status/retroSoC/retroSoC/regression-ihp130.yml?branch=main&style=flat-square&label=IHP130&labelColor=3b301a&logo=githubactions&logoColor=f6d365)](https://github.com/retroSoC/retroSoC/actions/workflows/regression-ihp130.yml)
+[![GF180 regression](https://img.shields.io/github/actions/workflow/status/retroSoC/retroSoC/regression-gf180.yml?branch=main&style=flat-square&label=GF180&labelColor=3b301a&logo=githubactions&logoColor=f6d365)](https://github.com/retroSoC/retroSoC/actions/workflows/regression-gf180.yml)
+[![ICS55 regression](https://img.shields.io/github/actions/workflow/status/retroSoC/retroSoC/regression-ics55.yml?branch=main&style=flat-square&label=ICS55&labelColor=3b301a&logo=githubactions&logoColor=f6d365)](https://github.com/retroSoC/retroSoC/actions/workflows/regression-ics55.yml)
+[![SKY130 regression](https://img.shields.io/github/actions/workflow/status/retroSoC/retroSoC/regression-sky130.yml?branch=main&style=flat-square&label=SKY130&labelColor=3b301a&logo=githubactions&logoColor=f6d365)](https://github.com/retroSoC/retroSoC/actions/workflows/regression-sky130.yml)
 
 retroSoC is a fully open-source RISC-V SoC project. The repository brings together
 SystemVerilog RTL, a freestanding embedded C SDK and applications, simulation, synthesis,
 static timing analysis, reproducible dependencies, and release packaging. It is licensed
 under the [Mulan Permissive Software License, Version 2](LICENSE).
 
-![Mini SoC block diagram](docs/mini-soc-block-diagram.svg)
-
 ## Highlights
 
 - A fixed Hazard3 management core with a permanent JTAG Debug Module, plus
@@ -259,10 +261,19 @@ same local deliverables under `dist/<variant>/`.
 See [`docs/engineering.md`](docs/engineering.md) for supported-flow details, artifact layout,
 warning and metric policy, CI behavior, and release contents.
 
-## Contributing And Security
+## Contributing
+
+Contributions are welcome. If you want to improve the RTL, software, verification,
+documentation, or development flows, open an issue or submit a pull request after
+reading [`CONTRIBUTING.md`](CONTRIBUTING.md).
 
-- Read [`CONTRIBUTING.md`](CONTRIBUTING.md) before submitting changes.
 - Report vulnerabilities according to [`Security.md`](Security.md).
 - Review retained third-party notices in [`NOTICE`](NOTICE) and
   [`ATTRIBUTIONS.md`](ATTRIBUTIONS.md).
 - The project is distributed under [Mulan PSL v2](LICENSE).
+
+A big **thank you** goes out to everyone who has contributed to retroSoC:
+
+<a href="https://github.com/retroSoC/retroSoC/graphs/contributors">
+  <img src="https://contrib.rocks/image?repo=retroSoC/retroSoC" alt="retroSoC contributors" />
+</a>