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feat(mpw): remove user Hazard3 design

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maksyuki committed 2026-08-04 20:20:23 +08:00
1 parent 35e855d1e2
commit 1549ebea49
16 files changed
+7227 -11739
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config/dependencies.lock.json
+2 -2
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@@ -3,14 +3,14 @@
"sources": {
"mpw": {
"url": "https://github.com/retroSoC/mini-ver-mpw.git",
"revision": "08ad5eecb469e7b25c9a4165982925b965745ae7",
"revision": "14dc77916c090c0ec780589c3da03a0803367818",
"destination": "rtl/managed/mpw",
"license": "NOASSERTION"
},
"hazard3": {
"url": "https://github.com/Wren6991/Hazard3.git",
"revision": "5b3a34f6955e50e03bdcb964201c91462f7078c3",
"destination": "rtl/managed/mpw/Hazard3",
"destination": "rtl/managed/hazard3",
"license": "NOASSERTION"
},
"ibex": {
quality/warnings/gf180/rtl-lint.json
+1797 -2927
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quality/warnings/ics55/rtl-lint.json
+1800 -2930
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quality/warnings/ihp130/rtl-lint.json
+1801 -2931
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quality/warnings/sky130/rtl-lint.json
+1761 -2891
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rtl/mini/Makefile
+8
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@@ -31,11 +31,19 @@ FILELIST_STAMP := $(GENERATED_FL_DIR)/.stamp
FILELIST_TEMPLATES := $(sort $(wildcard $(ROOT_PATH)/rtl/filelist/pdk_*.fl) \
$(wildcard $(RTL_PATH)/filelist/*.fl) $(RTL_PATH)/lint.msg)
ifeq ($(CORE),HAZARD3)
MPW_MANAGEMENT_CORE_CHECK := @test -d $(ROOT_PATH)/rtl/managed/hazard3/hdl || { \
echo "missing $(ROOT_PATH)/rtl/managed/hazard3; run 'make setup-mpw' first" >&2; \
exit 1; \
}
endif
$(MPW_STAMP):
@test -d $(ROOT_PATH)/rtl/managed/mpw/.git || { \
echo "missing $(ROOT_PATH)/rtl/managed/mpw; run 'make setup-mpw' first" >&2; \
exit 1; \
}
$(MPW_MANAGEMENT_CORE_CHECK)
$(FLOW_PYTHON) $(ROOT_PATH)/scripts/prepare_mpw.py \
--lock-file $(CACHE_ROOT)/locks/mpw-prepare.lock
@mkdir -p $(@D)
rtl/mini/filelist/core_hazard3.fl
+22 -22
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@@ -1,22 +1,22 @@
/mpw/core/username3/Hazard3/hazard3_core.v
/mpw/core/username3/Hazard3/hazard3_cpu_1port.v
/mpw/core/username3/Hazard3/hazard3_cpu_2port.v
/mpw/core/username3/Hazard3/arith/hazard3_alu.v
/mpw/core/username3/Hazard3/arith/hazard3_branchcmp.v
/mpw/core/username3/Hazard3/arith/hazard3_mul_fast.v
/mpw/core/username3/Hazard3/arith/hazard3_muldiv_seq.v
/mpw/core/username3/Hazard3/arith/hazard3_onehot_encode.v
/mpw/core/username3/Hazard3/arith/hazard3_onehot_priority.v
/mpw/core/username3/Hazard3/arith/hazard3_onehot_priority_dynamic.v
/mpw/core/username3/Hazard3/arith/hazard3_priority_encode.v
/mpw/core/username3/Hazard3/arith/hazard3_shift_barrel.v
/mpw/core/username3/Hazard3/hazard3_csr.v
/mpw/core/username3/Hazard3/hazard3_decode.v
/mpw/core/username3/Hazard3/hazard3_frontend.v
/mpw/core/username3/Hazard3/hazard3_instr_decompress.v
/mpw/core/username3/Hazard3/hazard3_irq_ctrl.v
/mpw/core/username3/Hazard3/hazard3_pmp.v
/mpw/core/username3/Hazard3/hazard3_power_ctrl.v
/mpw/core/username3/Hazard3/hazard3_regfile_1w2r.v
/mpw/core/username3/Hazard3/hazard3_triggers.v
+incdir+/mpw/core/username3/Hazard3/
/hazard3/hazard3_core.v
/hazard3/hazard3_cpu_1port.v
/hazard3/hazard3_cpu_2port.v
/hazard3/arith/hazard3_alu.v
/hazard3/arith/hazard3_branchcmp.v
/hazard3/arith/hazard3_mul_fast.v
/hazard3/arith/hazard3_muldiv_seq.v
/hazard3/arith/hazard3_onehot_encode.v
/hazard3/arith/hazard3_onehot_priority.v
/hazard3/arith/hazard3_onehot_priority_dynamic.v
/hazard3/arith/hazard3_priority_encode.v
/hazard3/arith/hazard3_shift_barrel.v
/hazard3/hazard3_csr.v
/hazard3/hazard3_decode.v
/hazard3/hazard3_frontend.v
/hazard3/hazard3_instr_decompress.v
/hazard3/hazard3_irq_ctrl.v
/hazard3/hazard3_pmp.v
/hazard3/hazard3_power_ctrl.v
/hazard3/hazard3_regfile_1w2r.v
/hazard3/hazard3_triggers.v
+incdir+/hazard3/
rtl/mini/integration/user_extensions.json
+7 -8
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@@ -4,15 +4,14 @@
"ip_selector_width": 8,
"gpio_width": 32,
"core_targets": [
{"slot": 0, "module": "mpw_core_kianv_rv32i_user_core_design", "instance": "u_mpw_core_kianv_rv32i", "bus": "ribp", "reset": "sync"},
{"slot": 1, "module": "mpw_core_kianv_rv32ima_user_core_design", "instance": "u_mpw_core_kianv_rv32ima", "bus": "ribp", "reset": "sync"},
{"slot": 2, "module": "mpw_core_hazard3_user_core_design", "instance": "u_mpw_core_hazard3", "bus": "ribp", "reset": "async"},
{"slot": 3, "module": "mpw_core_serv_user_core_design", "instance": "u_mpw_core_serv", "bus": "ribp", "reset": "async"},
{"slot": 4, "module": "mpw_core_femtorv32_user_core_design", "instance": "u_mpw_core_femtorv32", "bus": "ribp", "reset": "async"},
{"slot": 5, "module": "mpw_core_darkriscv_user_core_design", "instance": "u_mpw_core_darkriscv", "bus": "ribp", "reset": "async"}
{"slot": 0, "module": "mpw_c0", "instance": "u_mpw_core_kianv_rv32i", "bus": "ribp", "reset": "sync"},
{"slot": 1, "module": "mpw_c1", "instance": "u_mpw_core_kianv_rv32ima", "bus": "ribp", "reset": "sync"},
{"slot": 2, "module": "mpw_c2", "instance": "u_mpw_core_serv", "bus": "ribp", "reset": "async"},
{"slot": 3, "module": "mpw_c3", "instance": "u_mpw_core_femtorv32", "bus": "ribp", "reset": "async"},
{"slot": 4, "module": "mpw_c4", "instance": "u_mpw_core_darkriscv", "bus": "ribp", "reset": "async"}
],
"ip_targets": [
{"slot": 1, "module": "mpw_ip_tiny_timer_user_ip_design", "instance": "u_mpw_ip_tiny_timer"},
{"slot": 2, "module": "mpw_ip_tiny_gpio_user_ip_design", "instance": "u_mpw_ip_tiny_gpio"}
{"slot": 1, "module": "mpw_i1", "instance": "u_mpw_ip_tiny_timer"},
{"slot": 2, "module": "mpw_i2", "instance": "u_mpw_ip_tiny_gpio"}
]
}
rtl/mini/lint.msg
+1 -1
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@@ -1,5 +1,5 @@
{
+lint=all;
-file=/mpw/core/username3/Hazard3/arith/hazard3_muldiv_seq.v,/mpw/core/username3/Hazard3/hazard3_frontend.v,/mpw/core/username3/Hazard3/arith/hazard3_onehot_encode.v,/mpw/core/username3/Hazard3/hazard3_instr_decompress.v,/pdk/icsprout55-pdk/IP/IO/ICsprout_55LLULP1233_IO_251013/verilog/icsIOA_N55_3P3.v,/pdk/icsprout55-pdk/IP/STD_cell/ics55_LLSC_H7C_V1p10C100/ics55_LLSC_H7CR/verilog/ics55_LLSC_H7CR.v,/pdk/icsprout55-pdk/IP/STD_cell/ics55_LLSC_H7C_V1p10C100/ics55_LLSC_H7CL/verilog/ics55_LLSC_H7CL.v,/pdk/icsprout55-pdk/IP/STD_cell/ics55_LLSC_H7C_V1p10C100/ics55_LLSC_H7CH/verilog/ics55_LLSC_H7CH.v,/pdk/IHP-Open-PDK/ihp-sg13g2/libs.ref/sg13g2_stdcell/verilog/sg13g2_stdcell.v,/clusterip/i2c/model/at24cxxx.sv,/clusterip/spi/model/w25q128jvxim.sv,/picorv32/picorv32_ver.v,/picorv32/picorv32.v,/clusterip/common/rtl/cdc/cdc_2phase.sv,/clusterip/common/rtl/utils/register.sv,/clusterip/uart/model/rs232.sv,/tb/retrosoc_tb.sv,/clusterip/i2s/model/mic.sv,/model/ESP_PSRAM64H.sv,/third_party/model/sdram/sdr.v;
-file=/hazard3/arith/hazard3_muldiv_seq.v,/hazard3/hazard3_frontend.v,/hazard3/arith/hazard3_onehot_encode.v,/hazard3/hazard3_instr_decompress.v,/pdk/icsprout55-pdk/IP/IO/ICsprout_55LLULP1233_IO_251013/verilog/icsIOA_N55_3P3.v,/pdk/icsprout55-pdk/IP/STD_cell/ics55_LLSC_H7C_V1p10C100/ics55_LLSC_H7CR/verilog/ics55_LLSC_H7CR.v,/pdk/icsprout55-pdk/IP/STD_cell/ics55_LLSC_H7C_V1p10C100/ics55_LLSC_H7CL/verilog/ics55_LLSC_H7CL.v,/pdk/icsprout55-pdk/IP/STD_cell/ics55_LLSC_H7C_V1p10C100/ics55_LLSC_H7CH/verilog/ics55_LLSC_H7CH.v,/pdk/IHP-Open-PDK/ihp-sg13g2/libs.ref/sg13g2_stdcell/verilog/sg13g2_stdcell.v,/clusterip/i2c/model/at24cxxx.sv,/clusterip/spi/model/w25q128jvxim.sv,/picorv32/picorv32_ver.v,/picorv32/picorv32.v,/clusterip/common/rtl/cdc/cdc_2phase.sv,/clusterip/common/rtl/utils/register.sv,/clusterip/uart/model/rs232.sv,/tb/retrosoc_tb.sv,/clusterip/i2s/model/mic.sv,/model/ESP_PSRAM64H.sv,/third_party/model/sdram/sdr.v;
}
{ +warn=all; }
rtl/mini/script/generate_filelist.py
+1
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@@ -23,6 +23,7 @@ PATH_PREFIXES = {
"third_party": RTL_DIR / "managed" / "third_party",
"tech": RTL_DIR / "tech",
"core": MINI_DIR / "core",
"hazard3": RTL_DIR / "managed" / "hazard3" / "hdl",
"mpw": RTL_DIR / "managed" / "mpw",
"picorv32": RTL_DIR / "managed" / "picorv32" / "rtl",
"tb": MINI_DIR / "dv" / "tb",
scripts/doctor.py
+1 -1
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@@ -67,7 +67,7 @@ def main() -> int:
if args.formal == "YES":
tools.extend(("sby", "yosys", "yosys-smtbmc", "sv2v", "bitwuzla"))
source_names = ["mpw", "cluster_common", "third_party_ip"]
source_names = ["mpw", "hazard3", "cluster_common", "third_party_ip"]
pdk_names = {
"IHP130": "pdk_ihp130",
"ICS55": "pdk_ics55",
scripts/prepare_mpw.py
+2 -8
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@@ -17,8 +17,8 @@ except ModuleNotFoundError: # Python 3.10
ROOT = Path(__file__).resolve().parents[1]
sys.path.insert(0, str(ROOT))
from scripts.dependency_lock import archive, source # noqa: E402
from scripts.setup_helpers import download_file, ensure_git_repo # noqa: E402
from scripts.dependency_lock import archive # noqa: E402
from scripts.setup_helpers import download_file # noqa: E402
MPW_DIR = ROOT / "rtl/managed/mpw"
@@ -74,11 +74,6 @@ def prepare(update: bool) -> None:
if not (MPW_DIR / ".git").is_dir():
raise SystemExit("MPW generator is missing; run 'python3 setup.py' first")
hazard3 = source("hazard3")
ensure_git_repo(
hazard3["url"], ROOT / hazard3["destination"], hazard3["revision"],
update=update,
)
serv_archive = archive("serv")
download_file(
serv_archive["url"], ROOT / serv_archive["destination"],
@@ -86,7 +81,6 @@ def prepare(update: bool) -> None:
)
serv = extract_serv()
sync_tree(MPW_DIR / "Hazard3/hdl", manifest_design_dir("hazard3") / "Hazard3")
sync_tree(serv / "rtl", manifest_design_dir("serv") / "serv")
print("pinned MPW core sources are ready")
setup.py
+7 -6
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@@ -11,14 +11,15 @@ ROOT = Path(__file__).resolve().parent
def main() -> int:
parser = argparse.ArgumentParser(description="Install the pinned MPW generator")
parser = argparse.ArgumentParser(description="Install pinned MPW and management-core sources")
parser.add_argument("--update", action="store_true")
args = parser.parse_args()
dependency = source("mpw")
ensure_git_repo(
dependency["url"], ROOT / dependency["destination"], dependency["revision"],
recursive=dependency.get("recursive", False), update=args.update,
)
for name in ("mpw", "hazard3"):
dependency = source(name)
ensure_git_repo(
dependency["url"], ROOT / dependency["destination"], dependency["revision"],
recursive=dependency.get("recursive", False), update=args.update,
)
return 0
tests/rtl/sysctrl_fault_tb.sv
+1 -1
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@@ -124,7 +124,7 @@ module sysctrl_fault_tb;
if (read_data !== 32'd11) $fatal(1, "performance snapshot was not recorded");
read_register(32'h1000_B020, read_data);
if (read_data !== 32'h0000_003F) $fatal(1, "user cores were not held in reset");
if (read_data !== 32'h0000_001F) $fatal(1, "user cores were not held in reset");
write_register(32'h1000_B000, 32'h0000_0006);
read_register(32'h1000_B024, read_data);
if ((read_data & 32'h0000_081F) !== 32'h0000_0800) begin
tests/test_script_tools.py
+8 -4
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@@ -107,7 +107,10 @@ def test_generate_all_is_stable_and_expands_paths(tmp_path: Path) -> None:
assert {path: path.stat().st_mtime_ns for path in generated} == mtimes
assert (tmp_path / "def.fl").read_text(encoding="utf-8") == " ".join(defines) + "\n"
cluster = (tmp_path / "clusterip.fl").read_text(encoding="utf-8")
hazard3 = (tmp_path / "core_hazard3.fl").read_text(encoding="utf-8")
assert str(ROOT / "rtl/managed/clusterip") in cluster
assert str(ROOT / "rtl/managed/hazard3/hdl") in hazard3
assert "rtl/managed/mpw/core/username3" not in hazard3
assert (tmp_path / "core_hazard3.fl").is_file()
assert (tmp_path / "core_picorv32.fl").is_file()
assert {
@@ -525,6 +528,7 @@ def test_dependency_lock_and_config_key_include_a_fixed_timestamp(tmp_path: Path
lock = load_lock(ROOT / "config/dependencies.lock.json")
assert lock["schema_version"] == 1
assert len(lock["sources"]["mpw"]["revision"]) == 40
assert lock["sources"]["hazard3"]["destination"] == "rtl/managed/hazard3"
assert lock["sources"]["pdk_sky130"]["submodules"] == ["libraries/sky130_fd_sc_hd/latest"]
command = (
@@ -1151,13 +1155,13 @@ def test_warning_normalization_maps_isolated_mpw_sources_to_managed_sources(
tmp_path: Path,
) -> None:
message = (
f"{tmp_path}/build/ihp130-deadbeef/generated/mpw/verilator/core/username3/"
"./Hazard3/hazard3_core_username3.v:42: unused signal"
f"{tmp_path}/build/ihp130-deadbeef/generated/mpw/verilator/core/username1/"
"./kianV/kianv_harris_mc_edition_username1.v:42: unused signal"
)
normalized = normalize(tmp_path, "UNUSEDSIGNAL", message)
assert normalized == (
"UNUSEDSIGNAL:$ROOT/rtl/managed/mpw/core/username3/Hazard3/"
"hazard3_core.v:<line>: unused signal"
"UNUSEDSIGNAL:$ROOT/rtl/managed/mpw/core/username1/kianV/"
"kianv_harris_mc_edition.v:<line>: unused signal"
)
tests/test_user_extensions.py
+8 -7
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@@ -48,17 +48,18 @@ def test_extensions_generate_isolated_scalar_bindings(tmp_path: Path) -> None:
ip = (tmp_path / "rtl/user_ip_bindings.svh").read_text(encoding="utf-8")
filelist = (tmp_path / "user_extensions.fl").read_text(encoding="utf-8")
assert core.count("rib_if u_user_") == 6
assert core.count("ribp_if u_user_") == 6
assert core.count("ribp2rib #(") == 6
assert core.count("rib_if u_user_") == 5
assert core.count("ribp_if u_user_") == 5
assert core.count("ribp2rib #(") == 5
assert core.count(".SYNC_RESET(1'b1)") == 2
assert core.count(".SYNC_RESET(1'b0)") == 4
assert core.count(".SYNC_RESET(1'b0)") == 3
assert "rib.cmd_valid = '0;" in core
assert "5'd0: begin" in core
assert "5'd5: begin" in core
assert "5'd4: begin" in core
assert "5'd5: begin" not in core
assert "core_reset_i[0]" in core
assert "mpw_core_kianv_rv32i_user_core_design #(0)" in core
assert "mpw_ip_tiny_timer_user_ip_design #(1)" in ip
assert "mpw_c0 #(0)" in core
assert "mpw_i1 #(1)" in ip
assert "User core 0 uses the RIBP contract" in core
assert ip.count("user_gpio_if #(`USER_GPIO_NUM)") == 2
assert "gpio.do_o = '0;" in ip