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https://github.com/retroSoC/retroSoC.git
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refactor: remove HAVE_DEBUG feature and related code
- Eliminated the HAVE_DEBUG preprocessor directive and all associated code from the RTL and test files. - Updated the Emulator class to remove JTAG-related debug signals and configurations. - Adjusted the pin map and JSON configurations to exclude debug-related entries. - Modified the management core wrapper to only support the HAZARD3 core, removing references to the PICORV32 core. - Updated tests to reflect the removal of the HAVE_DEBUG feature, ensuring they no longer check for debug-related conditions. - Cleaned up various scripts and makefiles to remove dependencies on the HAVE_DEBUG flag, streamlining the build process.
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@@ -24,7 +24,7 @@ def parse_args() -> argparse.Namespace:
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parser.add_argument("--sta", required=True)
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parser.add_argument("--pdk", required=True)
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parser.add_argument("--formal", choices=("YES", "NO"), default="NO")
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parser.add_argument("--debug", choices=("YES", "NO"), default="NO")
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parser.add_argument("--require-debug-tools", action="store_true")
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parser.add_argument("--lock", type=Path, default=DEFAULT_LOCK)
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parser.add_argument("--format", choices=("text", "json"), default="text")
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parser.add_argument("--output", type=Path)
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@@ -67,7 +67,7 @@ def main() -> int:
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tools.append("sta")
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if args.formal == "YES":
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tools.extend(("sby", "yosys", "yosys-smtbmc", "sv2v", "bitwuzla"))
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if args.debug == "YES":
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if args.require_debug_tools:
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tools.extend(("openocd", "riscv32-unknown-elf-gdb"))
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source_names = ["mpw", "hazard3", "cluster_common", "third_party_ip"]
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+5
-3
@@ -66,7 +66,9 @@ def make_sbom(lock: dict[str, object]) -> dict[str, object]:
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components.extend(
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container_component(name, spec) for name, spec in lock["container_images"].items()
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)
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components.extend(component(f"nix/{name}", "source", spec) for name, spec in lock["nix_inputs"].items())
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components.extend(
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component(f"nix/{name}", "source", spec) for name, spec in lock["nix_inputs"].items()
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)
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for platform, tools in lock["toolchains"].items():
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components.extend(
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component(f"{platform}/{name}", "toolchain", spec) for name, spec in tools.items()
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@@ -108,8 +110,8 @@ def main() -> int:
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config["PDK"],
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"--simu",
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config["SIMU"],
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"--core",
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config.get("CORE", "HAZARD3"),
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"--jtag-idcode",
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config.get("JTAG_IDCODE", "DEADBEEF"),
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"--dynamic-core-filelist",
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str(args.variant_root / "generated/mpw" / config["SIMU"].lower() / "core/core.fl"),
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"--dynamic-ip-filelist",
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@@ -71,7 +71,6 @@ def main() -> int:
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"-Wextra",
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"-Werror",
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"-fno-builtin",
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"-DRS_SOC_MGMT_CORE_HAZARD3",
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"-I",
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str(memory_map_root / "include"),
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"-I",
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