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feat: add testbenches for on-chip RAM and resource controller, enhance AXI4 and APB4 support
- Introduced to validate AXI4 interface for 64-bit on-chip SRAM. - Added to test resource controller functionality including ownership, IRQ handling, and cache handshake. - Updated to include resource controller interface. - Enhanced to cover additional IRQ scenarios. - Added new tests in for AXI4 target guard timeout and isolation. - Updated to reflect changes in the high-performance profile. - Modified to verify on-chip SRAM bank configurations. - Added for directed verification of resource controller. - Updated to check SDRAM mapped window coverage. - Enhanced to ensure correct IRQ mappings and APB target generation.
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@@ -14,6 +14,7 @@
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#include <retrosoc/hal/lcd.h>
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#include <retrosoc/hal/i2s.h>
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#include <retrosoc/hal/psram.h>
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#include <retrosoc/hal/resource.h>
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#include <retrosoc/hal/sdram.h>
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#include <retrosoc/hal/sdio.h>
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#include <retrosoc/hal/spisd.h>
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@@ -846,6 +847,22 @@ static int test_extension_validation(void) {
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return 0;
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}
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static int test_resource_validation(void) {
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rs_resource_status_t status;
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if ((rs_resource_get_status((rs_resource_t)RS_RESOURCE_COUNT, &status) != RS_EINVAL) ||
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(rs_resource_get_status(RS_RESOURCE_DMA, NULL) != RS_EINVAL) ||
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(rs_resource_set_owner((rs_resource_t)RS_RESOURCE_COUNT, RS_RESOURCE_OWNER_LP, false) !=
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RS_EINVAL) ||
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(rs_resource_set_owner(RS_RESOURCE_DMA, (rs_resource_owner_t)2, false) != RS_EINVAL) ||
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(rs_resource_set_lifecycle((rs_resource_t)RS_RESOURCE_COUNT, false, false) != RS_EINVAL) ||
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(rs_resource_clear_fault((rs_resource_t)RS_RESOURCE_COUNT) != RS_EINVAL) ||
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(rs_resource_get_cache_status(NULL) != RS_EINVAL)) {
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return 1;
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}
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return 0;
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}
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static int test_ps2_decoders(void) {
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ps2_keyboard_decoder_t keyboard;
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ps2_mouse_decoder_t mouse;
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@@ -935,6 +952,7 @@ int main(void) {
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test_opipsram_helpers(),
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test_user_ip_validation(),
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test_extension_validation(),
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test_resource_validation(),
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test_ps2_decoders(),
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test_wav_parser(),
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test_video_parser(),
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