docs: record the ICS55 SRAM macro path and its evidence

Extend the chapter 3 SRAM swap documentation to the ICS55 exact-geometry
macros: hp-platform.md describes the direct-replacement mapping and
gating next to the IHP130 stacking table, hp-rv64-validation.md records
the ICS55 boot-TB, MEM_INTF, and SoC macro-sim evidence along with the
precise remaining gaps (Yosys smoke synth needs Liberty registration for
the new macros; STA/LEC stay deferred), and the two READMEs generalize
the override wording to the PDK-selectable IHP130/ICS55 paths.

scripts/README.md

@@ -131,8 +131,10 @@ the vendored checkout is never modified. `generate_openc906.py` resolves the
 upstream `C906_RTL_FACTORY/gen_rtl` filelists from that checkout, substitutes
 the reviewed overrides from `rtl/mini/ip_overrides/` (the hart-1
 `aq_sysio_kid.v`, the strong-order MMIO-window `sysmap.h`, and the eight
-`aq_spsram_*.v` SRAM wrappers whose IHP130 macro path is gated on
-`PDK_IHP130`+`HAVE_SRAM_MACRO` without `PDK_BEHAV`, each pinned to
+`aq_spsram_*.v` SRAM wrappers whose PDK-selectable macro path — stacked
+IHP130 `RM_IHPSG13_1P_*` or exact-geometry ICS55 `ics55_ecos_sram_*` — is
+gated on `PDK_IHP130`/`PDK_ICS55`+`HAVE_SRAM_MACRO` without `PDK_BEHAV`,
+each pinned to
 the upstream file's SHA-256 so a locked-revision move forces review), and
 emits the single compilation unit `openc906_combined.v` below `build/`;
 generated RTL is never tracked.