feat: add support for GF180 and SKY130 PDKs with corresponding warnings and simulation files

- Introduced new JSON files for warnings generated by Icarus Verilog, Verilator, and Yosys for both GF180 and SKY130 PDKs.
- Updated the build requirements to include necessary packages for handling JSON data.
- Modified RTL filelists to use generated files for GF180 and SKY130 standard-cell models.
- Enhanced the Iverilog makefile to generate filelists dynamically based on the selected PDK.
- Implemented a Python script to generate Iverilog filelists, accommodating both GF180 and SKY130 technologies.
- Added behavioral definitions for GF180 UDPs and a tri-state buffer for netlist simulations.
- Updated Yosys synthesis scripts to handle new PDKs and ensure proper tie cell mapping.
- Extended regression scripts to support PDK-specific commands for GF180 and SKY130.
- Added tests to verify that PDK-specific regression commands cover firmware, RTL, and netlist simulations.

tests/test_script_tools.py

@@ -27,7 +27,13 @@ from scripts.check_format import format_files  # noqa: E402
 from scripts.dependency_lock import LockError, load_lock  # noqa: E402
 from scripts.generate_mpw import migrate_user_gpio_interfaces  # noqa: E402
 from scripts.install_toolchain import safe_extract  # noqa: E402
-from scripts.regress import NIGHTLY_COMMANDS, PR_COMMANDS, regression_environment  # noqa: E402
+from scripts.regress import (  # noqa: E402
+    NIGHTLY_COMMANDS,
+    PDK_PR_PROFILES,
+    PR_COMMANDS,
+    pdk_pr_commands,
+    regression_environment,
+)
 from scripts.setup_helpers import download_file, ensure_git_repo  # noqa: E402
 
 
@@ -309,6 +315,18 @@ def test_verilator_simulations_use_uniform_timeout() -> None:
             assert "HAVE_SVA=YES" in values
 
 
+def test_pdk_pr_regressions_cover_firmware_rtl_and_netlist() -> None:
+    assert set(PDK_PR_PROFILES) == {"GF180", "IHP130", "SKY130"}
+    for profile in PDK_PR_PROFILES.values():
+        commands = pdk_pr_commands(profile)
+        command_values = [values for _, values in commands]
+        assert ("firmware",) in command_values
+        assert any("SIMU=VERILATOR" in values and "firmware" in values for values in command_values)
+        assert any("SIMU=IVERILOG" in values and "sim-asm" in values for values in command_values)
+        assert any("SYNTH=YOSYS" in values and "synth" in values for values in command_values)
+        assert any("SIMU=IVERILOG" in values and "netsim" in values for values in command_values)
+
+
 def test_run_flow_writes_structured_result(tmp_path: Path) -> None:
     log = tmp_path / "flow.log"
     result = tmp_path / "result.json"