feat: add I2C support to the SoC topology and formal verification

- Updated  to include I2C1 in IRQ bindings.
- Modified  to increase IRQ group width and add I2C1 interrupt.
- Enhanced  to include I2C formal properties and adjust timeouts.
- Added I2C-related source files to the formal verification flow.
- Updated DMA wrapper in  to handle I2C DMA signals.
- Created a new testbench  for I2C functionality verification.
- Implemented I2C helper functions in  for testing.
- Added I2C tests in  to validate controller behavior and recovery.
- Updated existing tests to accommodate changes in DMA and IRQ handling.

tests/test_i2c.py

@@ -0,0 +1,66 @@
+"""Directed I2C V2 controller, FIFO, error, timeout, and recovery tests."""
+
+from __future__ import annotations
+
+import shutil
+import subprocess
+import sys
+from pathlib import Path
+
+
+ROOT = Path(__file__).resolve().parents[1]
+
+
+def test_i2c_v2_controller_and_recovery_contract(tmp_path: Path) -> None:
+    iverilog = shutil.which("iverilog")
+    vvp = shutil.which("vvp")
+    if iverilog is None or vvp is None:
+        return
+
+    common = ROOT / "rtl/managed/clusterip/common/rtl"
+    serial = ROOT / "rtl/ip/ribp/serial"
+    cluster_i2c = ROOT / "rtl/managed/clusterip/i2c/rtl"
+    source_list = tmp_path / "i2c.fl"
+    source_list.write_text(
+        "\n".join(
+            [
+                "+define+SV_ASSRT_DISABLE",
+                f"+incdir+{common}",
+                f"+incdir+{common / 'interface'}",
+                f"+incdir+{common / 'utils'}",
+                f"+incdir+{common / 'cdc'}",
+                f"+incdir+{serial}",
+                str(common / "interface/ribp_if.sv"),
+                str(common / "utils/register.sv"),
+                str(common / "utils/fifo.sv"),
+                str(common / "cdc/cdc_sync.sv"),
+                str(cluster_i2c / "i2c_if.sv"),
+                str(serial / "i2c_filter.sv"),
+                str(serial / "i2c_core.sv"),
+                str(serial / "i2c_reg.sv"),
+                str(serial / "ribp_i2c.sv"),
+                str(ROOT / "tests/rtl/i2c_tb.sv"),
+                "",
+            ]
+        ),
+        encoding="utf-8",
+    )
+    converted = tmp_path / "i2c_tb.v"
+    subprocess.run(
+        [
+            sys.executable,
+            str(ROOT / "rtl/mini/script/convt_sv2v.py"),
+            "-f",
+            str(source_list),
+            "--output",
+            str(converted),
+        ],
+        check=True,
+    )
+    simulation = tmp_path / "i2c_tb"
+    subprocess.run(
+        [iverilog, "-g2012", "-s", "i2c_tb", "-o", str(simulation), str(converted)],
+        check=True,
+    )
+    result = subprocess.run([vvp, str(simulation)], text=True, capture_output=True, check=True)
+    assert "I2C V2 transfer, error, stretch, arbitration, and recovery test passed" in result.stdout