feat: add HP mailbox and PLIC tests; enhance existing test coverage

- Updated axi4_interconnect_tb to include an additional master and issue high-priority access tests.
- Introduced hp_mailbox_tb for testing the HP mailbox functionality, including register and doorbell operations.
- Added plic_tb to validate PLIC priority, claim, and completion mechanisms.
- Enhanced pll_ctrl_tb to initialize additional system control signals.
- Updated soc_irq_topology_tb to account for new IRQ sources and validate IRQ signal behavior.
- Improved sysctrl_tb to include tests for HP lifecycle control and status registers.
- Added tests for HP boot bundle layout, CRC, and payload validation.
- Introduced test_hp_mailbox.py for RTL regression testing of the HP mailbox.
- Added test_hp_platform.py to validate HP platform configuration and generated-source boundaries.
- Enhanced test_librelane_flow.py to ensure correct signal placement in chip configuration.
- Added performance log tests to validate LP and HP coremark ratios.
- Updated test_soc_topology.py to reflect changes in IRQ and peripheral mappings.

tests/test_plic.py

@@ -0,0 +1,51 @@
+"""HP PLIC RTL regression test."""
+
+from __future__ import annotations
+
+import shutil
+import subprocess
+import sys
+from pathlib import Path
+
+
+ROOT = Path(__file__).resolve().parents[1]
+
+
+def test_plic_priority_claim_and_completion(tmp_path: Path) -> None:
+    iverilog = shutil.which("iverilog")
+    vvp = shutil.which("vvp")
+    if iverilog is None or vvp is None:
+        return
+
+    common = ROOT / "rtl/managed/clusterip/common/rtl"
+    peripheral = ROOT / "rtl/ip/peripheral"
+    filelist = tmp_path / "plic.fl"
+    filelist.write_text(
+        "\n".join(
+            [
+                "+define+SV_ASSRT_DISABLE",
+                f"+incdir+{common}",
+                f"+incdir+{common / 'interface'}",
+                f"+incdir+{common / 'utils'}",
+                str(common / "interface/apb4_if.sv"),
+                str(common / "utils/register.sv"),
+                str(peripheral / "apb4_plic.sv"),
+                str(ROOT / "tests/rtl/plic_tb.sv"),
+                "",
+            ]
+        ),
+        encoding="utf-8",
+    )
+    converted = tmp_path / "plic_tb.v"
+    subprocess.run(
+        [sys.executable, str(ROOT / "rtl/mini/script/convt_sv2v.py"), "-f", str(filelist),
+         "--output", str(converted)],
+        check=True,
+    )
+    simulation = tmp_path / "plic_tb"
+    subprocess.run(
+        [iverilog, "-g2012", "-s", "plic_tb", "-o", str(simulation), str(converted)],
+        check=True,
+    )
+    result = subprocess.run([vvp, str(simulation)], check=True, capture_output=True, text=True)
+    assert "PLIC priority, claim, and completion test passed" in result.stdout