feat: add comprehensive tests for AXI4 components and lifecycle controllers

- Implemented tests for AXI4 async bridge functionality, including transfer and warm flush scenarios.
- Added tests for AXI4 data crossbar to validate concurrent outstanding requests and ACL handling.
- Introduced clock frequency monitor tests to ensure detection of clock stop and restart events.
- Developed tests for extension DMA master to verify copy operations, tail strobe behavior, and timeout handling.
- Created tests for HP lifecycle controller to validate drain, flush, and forced reset functionalities.
- Updated existing test scripts to include new RTL components and ensure proper simulation configurations.

tests/c/test_runtime.c

@@ -836,6 +836,13 @@ static int test_extension_validation(void) {
     if (rs_extension_configure_acl(RS_EXTENSION_SLOT_H, &invalid_acl) != RS_EINVAL) {
         return 5;
     }
+    if ((rs_extension_dma_start((uintptr_t)UINT32_C(0x30000001), (uintptr_t)UINT32_C(0x30000008),
+                                UINT32_C(8)) != RS_EINVAL) ||
+        (rs_extension_dma_start((uintptr_t)UINT32_C(0x30000000), (uintptr_t)UINT32_C(0x30000008),
+                                0U) != RS_EINVAL) ||
+        (rs_extension_dma_get_status(NULL) != RS_EINVAL)) {
+        return 6;
+    }
     return 0;
 }