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feat: enhance DMA and RIB functionality with burst support and performance tests
- Updated dma_error_tb to implement burst transfer handling and performance measurement for INCR4 transfers. - Introduced rib_burst_bus_tb to validate RIB burst arbitration and protocol compliance. - Added soc_rib_burst_ram_tb to test SRAM behavior with burst commands. - Created spill_register_tb to verify the functionality of the spill register under various conditions. - Modified test_dma.py to reflect changes in DMA error handling and performance reporting. - Updated test_memory_map.py to include new RIB burst interfaces and spill register utilities. - Enhanced test_rib_burst.py with directed tests for RIB burst building blocks and spill register behavior. - Adjusted test_soc_topology.py to ensure correct instantiation counts for RIB interfaces. - Improved test_user_extensions.py to validate the generation of isolated scalar bindings for burst interfaces.
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@@ -113,9 +113,15 @@ def test_bus_fault_responder_handles_reserved_and_unmapped_addresses(tmp_path: P
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f"+incdir+{tmp_path / 'user_extensions' / 'rtl'}",
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f"+incdir+{ROOT / 'rtl/managed/clusterip/common/rtl'}",
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str(ROOT / "rtl/managed/clusterip/common/rtl/interface/rib_if.sv"),
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str(ROOT / "rtl/managed/clusterip/common/rtl/interface/ram_if.sv"),
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str(ROOT / "rtl/mini/top/soc_rib_if.sv"),
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str(ROOT / "rtl/mini/top/soc_rib_burst_if.sv"),
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str(ROOT / "rtl/managed/clusterip/common/rtl/utils/register.sv"),
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str(ROOT / "rtl/mini/top/soc_rib_regslice.sv"),
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str(ROOT / "rtl/managed/clusterip/common/rtl/utils/spill_register.sv"),
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str(ROOT / "rtl/mini/top/soc_rib_legacy_to_burst.sv"),
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str(ROOT / "rtl/mini/top/soc_rib_burst_to_legacy.sv"),
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str(ROOT / "rtl/mini/top/soc_rib_burst_error_slave.sv"),
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str(ROOT / "rtl/mini/top/soc_rib_burst_ram.sv"),
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str(ROOT / "rtl/mini/top/bus.sv"),
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str(ROOT / "tests/rtl/bus_fault_tb.sv"),
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"",
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