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https://github.com/retroSoC/retroSoC.git
synced 2026-11-06 14:55:14 +00:00
feat: add RTC wake functionality and related integration
- Introduced signal in sysctrl interface and module to handle RTC wake events. - Added RTC wake status register in memory map and updated related tests. - Integrated RTC wake handling in the APB wrapper and core wrapper. - Enhanced clock and reset domain configurations to include RTC signals. - Updated software build configurations to include RTC source files and headers. - Modified formal verification and testbench files to accommodate RTC wake functionality. - Ensured proper synchronization and status recording for RTC wake events in the sysctrl module.
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@@ -72,6 +72,7 @@ module sysctrl_fault_tb;
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sysctrl.perf_sdram_wait_i = 64'd16;
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sysctrl.perf_psram_wait_i = 64'd17;
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sysctrl.perf_flash_wait_i = 64'd18;
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sysctrl.rtc_wake_i = 1'b0;
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pll_ctrl.req_ready_i = 1'b1;
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pll_ctrl.rsp_active_sel_i = '0;
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pll_ctrl.rsp_active_valid_i = 1'b0;
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@@ -163,7 +164,29 @@ module sysctrl_fault_tb;
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$fatal(1, "terminal test status was overwritten");
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end
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$display("sysctrl fault and user core control test passed");
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read_register(32'h1000_B088, read_data);
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if (read_data !== 32'h0000_0000) begin
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$fatal(1, "RTC wake status did not reset");
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end
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sysctrl.rtc_wake_i = 1'b1;
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repeat (4) @(posedge clk_i);
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read_register(32'h1000_B088, read_data);
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if (read_data !== 32'h0000_0003) begin
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$fatal(1, "RTC wake live and sticky status was not recorded");
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end
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sysctrl.rtc_wake_i = 1'b0;
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repeat (4) @(posedge clk_i);
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read_register(32'h1000_B088, read_data);
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if (read_data !== 32'h0000_0002) begin
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$fatal(1, "RTC wake sticky status was not retained");
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end
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write_register(32'h1000_B088, 32'h0000_0002);
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read_register(32'h1000_B088, read_data);
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if (read_data !== 32'h0000_0000) begin
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$fatal(1, "RTC wake sticky status W1C failed");
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end
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$display("sysctrl fault, user core control, and RTC wake test passed");
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$finish;
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end
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endmodule
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