feat: add RTC wake functionality and related integration

- Introduced  signal in sysctrl interface and module to handle RTC wake events.
- Added RTC wake status register in memory map and updated related tests.
- Integrated RTC wake handling in the APB wrapper and core wrapper.
- Enhanced clock and reset domain configurations to include RTC signals.
- Updated software build configurations to include RTC source files and headers.
- Modified formal verification and testbench files to accommodate RTC wake functionality.
- Ensured proper synchronization and status recording for RTC wake events in the sysctrl module.
This commit is contained in:
maksyuki committed 2026-08-10 09:32:30 +08:00
1 parent 34624a913a
commit c9a3d7934c
38 files changed
+663 -361

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@@ -3,6 +3,7 @@
from __future__ import annotations
import json
import math
import subprocess
import sys
from pathlib import Path
@@ -50,6 +51,19 @@ def test_clock_reset_domain_inventory_matches_the_rcu() -> None:
crossing for crossing in document["crossings"] if crossing["name"] == "clint_timebase"
)
assert clint["primitive"] == "edge_det"
assert {
"rtc_command",
"rtc_response",
"rtc_event",
"rtc_status",
"rtc_interrupt_enable",
"rtc_wake_enable",
"rtc_wake_status",
} <= {crossing["name"] for crossing in document["crossings"]}
audio = next(domain for domain in document["domains"] if domain["name"] == "audio")
assert math.isclose(audio["sta"]["period_ns"], 1_000_000_000 / 18_432_000)
for profile in (ROOT / "configs").rglob("*.mk"):
assert "AUD_CLK_HZ" in profile.read_text(encoding="utf-8")
def test_clock_reset_domain_inventory_rejects_unknown_domain_and_instance(tmp_path: Path) -> None: