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feat: add crypto accelerator support and related tests

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- Modified DMA error testbench to include crypto input and output AXI4 stream interfaces.
- Updated DMA register testbench to integrate crypto AXI4 stream interfaces.
- Enhanced SOC IRQ topology test to account for new crypto IRQs.
- Added WS2812 DMA testbench modifications for crypto interfaces.
- Introduced new Python tests for crypto primitives (AES, SHA, RSA) and APB register paths.
- Implemented register parity tests to ensure synchronization between RTL and SDK constants.
- Expanded DMA tests to validate crypto streaming endpoints.
- Updated memory map tests to include crypto address definitions.
- Adjusted SOC topology tests to reflect changes in IRQ mappings and peripheral counts.
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maksyuki committed 2026-08-21 07:29:00 +08:00
1 parent 7df897b038
commit db9282aaf6
55 files changed
+6204 -189
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tests/test_memory_map.py
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@@ -124,6 +124,8 @@ def test_user_ip_is_always_emitted_for_the_fixed_platform(tmp_path: Path) -> Non
assert "#define RS_SOC_APB4_OPIPSRAM_BASE UINT32_C(0x10010000)" in header
assert "`define SOC_ADDR_APB4_SDIO0_BASE 32'h1000F000" in rtl
assert "`define SOC_ADDR_APB4_SDIO1_BASE 32'h10015000" in rtl
assert "`define SOC_ADDR_APB4_CRYPTO_BASE 32'h1000C000" in rtl
assert "#define RS_SOC_APB4_CRYPTO_BASE UINT32_C(0x1000C000)" in header
def test_bootstrap_assembly_uses_the_generated_gpio_admin_base() -> None: