feat: add USB2 support and related tests

- Introduced a new USB2 transaction engine testbench to validate the functionality of the USB2 transaction engine.
- Updated clock and reset domain tests to include USB2 ULPI crossings.
- Enhanced memory map tests to verify USB2 base addresses and performance offsets.
- Modified pin map tests to ensure USB2 ULPI pins are correctly generated.
- Updated SOC topology tests to account for USB2 peripherals and IRQ mappings.
- Added static timing analysis constraints for USB2 clock domains.
- Created dedicated USB2 tests for various components including packet RAM, descriptor validation, and transaction engine.
- Implemented a register parity test to ensure ABI consistency between RTL and C header definitions.
This commit is contained in:
maksyuki committed 2026-08-22 07:15:41 +08:00
1 parent e6e3a06136
commit e219973c45
86 files changed
+11305 -48

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@@ -39,6 +39,7 @@ def test_clock_reset_domain_inventory_matches_the_rcu() -> None:
"audio",
"jtag",
"dvp",
"usb2_ulpi",
}
assert {
(crossing["name"], crossing["source"], crossing["destination"])
@@ -51,6 +52,32 @@ def test_clock_reset_domain_inventory_matches_the_rcu() -> None:
crossing for crossing in document["crossings"] if crossing["name"] == "clint_timebase"
)
assert clint["primitive"] == "edge_det"
assert {
"usb2_work",
"usb2_result",
"usb2_setup",
"usb2_fill_command",
"usb2_drain_command",
"usb2_buffer_event",
"usb2_view_request",
"usb2_view_response",
"usb2_fill_stream",
"usb2_drain_stream",
"usb2_role",
"usb2_role_reset",
"usb2_phy_reset",
"usb2_high_speed",
"usb2_enable",
"usb2_device_addr",
"usb2_endpoint_config",
"usb2_timeout",
"usb2_phy_status",
"usb2_transaction_busy",
"usb2_frame",
"usb2_ecc_counts",
"usb2_retry_event",
"usb2_protocol_event",
} <= {crossing["name"] for crossing in document["crossings"]}
assert {
"rtc_command",
"rtc_response",