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feat: enhance DMA functionality with TCD and CRC support

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- Added TCD head and count registers to DMA definition and register files.
- Introduced CRC expected and result registers for enhanced error checking.
- Updated DMA version to 2.0 to reflect new features.
- Modified DMA testbench to validate new TCD and CRC functionalities.
- Enhanced README and filelists to include new dependencies and configurations.
- Updated formal verification and runtime tests to accommodate new DMA features.
This commit is contained in:
maksyuki committed 2026-08-28 08:42:36 +08:00
1 parent 8ba8a0ad47
commit e86187a5f3
28 files changed
+1078 -271
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tests/c/test_runtime.c
+28 -1
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@@ -691,6 +691,7 @@ static int test_gpio_helpers(void) {
}
static int test_dma_config_validation(void) {
static rs_dma_tcd_t tcd __attribute__((aligned(64)));
rs_dma_config_t config = {
.kind = RS_DMA_KIND_MM_TO_MM,
.request = RS_DMA_REQUEST_SOFTWARE,
@@ -713,7 +714,7 @@ static int test_dma_config_validation(void) {
}
config.width = RS_DMA_WIDTH_32;
config.byte_count = 6U;
if (rs_dma_config_validate(RS_DMA_CHANNEL_BULK, &config) != RS_EINVAL) {
if (rs_dma_config_validate(RS_DMA_CHANNEL_BULK, &config) != RS_OK) {
return 3;
}
config.byte_count = 64U;
@@ -723,10 +724,36 @@ static int test_dma_config_validation(void) {
if (rs_dma_config_validate(RS_DMA_CHANNEL_BULK, &config) != RS_OK) {
return 4;
}
config.byte_count = 6U;
if (rs_dma_config_validate(RS_DMA_CHANNEL_BULK, &config) != RS_EINVAL) {
return 6;
}
config.source_increment = false;
if (rs_dma_config_validate(RS_DMA_CHANNEL_BULK, &config) != RS_EINVAL) {
return 5;
}
tcd.next_ptr = 0U;
tcd.source = UINT32_C(0x40000000);
tcd.destination = UINT32_C(0x41000000);
tcd.byte_count = 6U;
tcd.source_stride = 0;
tcd.destination_stride = 0;
tcd.y_count = 1U;
tcd.control = RS_DMA_TCD_VALID | RS_DMA_TCD_SRC_INC | RS_DMA_TCD_DST_INC |
((uint32_t)RS_DMA_KIND_MM_TO_MM << RS_DMA_TCD_KIND_SHIFT) |
((uint32_t)RS_DMA_REQUEST_SOFTWARE << RS_DMA_TCD_REQUEST_SHIFT) |
(UINT32_C(1) << RS_DMA_TCD_PRIORITY_SHIFT) |
(UINT32_C(16) << RS_DMA_TCD_BURST_SHIFT);
if (rs_dma_tcd_validate(RS_DMA_CHANNEL_BULK, &tcd) != RS_OK) {
return 7;
}
tcd.control = RS_DMA_TCD_VALID | RS_DMA_TCD_SRC_INC |
((uint32_t)RS_DMA_KIND_MM_TO_STREAM << RS_DMA_TCD_KIND_SHIFT) |
((uint32_t)RS_DMA_REQUEST_I2S_TX << RS_DMA_TCD_REQUEST_SHIFT) |
(UINT32_C(1) << RS_DMA_TCD_PRIORITY_SHIFT);
if (rs_dma_tcd_validate(RS_DMA_CHANNEL_BULK, &tcd) != RS_EINVAL) {
return 8;
}
return 0;
}