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feat: add support for ICS55 PDK in various components and tools

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- Introduced Verilator and Yosys warning configurations for ICS55.
- Updated RTL filelists to include functional models for ICS55.
- Modified memory modules to use wire instead of logic for clock and reset signals.
- Enhanced Makefile and Iverilog configurations to support ICS55.
- Implemented new simulation cells for ICS55 in the tech library.
- Updated regression scripts and tests to include ICS55 support.
- Added functionality to prepare ICS55 liberty and simulation models.
- Enhanced testbench to validate ICS55 specific components and behaviors.
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maksyuki committed 2026-08-01 11:55:49 +08:00
1 parent efac07b29c
commit ed19891bf5
35 files changed
+5336 -43
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tests/test_script_tools.py
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@@ -664,7 +664,7 @@ def test_smoke_regression_uses_ihp130_behavioral_coverage_only() -> None:
def test_pdk_pr_regressions_cover_firmware_rtl_and_netlist() -> None:
assert set(PDK_PR_PROFILES) == {"GF180", "IHP130", "SKY130"}
assert set(PDK_PR_PROFILES) == {"GF180", "IHP130", "ICS55", "SKY130"}
for profile in PDK_PR_PROFILES.values():
commands = pdk_pr_commands(profile)
command_values = [values for _, values in commands]