feat: refactor XPI integration and add programming tool

- Updated filelist to include new XPI source files.
- Modified IRQ compatibility mapping for XPI in the SOC topology generator.
- Adjusted JSON topology configuration to reflect new IRQ signal naming.
- Changed software.mk to reference the new XPI HAL source file.
- Enhanced APB4 peripheral module to include XPI IRQ signal.
- Updated RTL style audit to include new XPI files.
- Documented new XPI programming script in README.
- Added a new script for programming XPI flash through OpenOCD.
- Enhanced XPI IO testbench to validate new LUT engine and isolation behavior.
- Created unit tests for the new XPI programming tool and its functionalities.
This commit is contained in:
maksyuki committed 2026-08-20 20:48:36 +08:00
1 parent 075344df58
commit ef84c818b0
47 files changed
+5166 -2736

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@@ -12,6 +12,8 @@ profiles. The `ihp130-hazard3-coremark.mk` profile is the automated SRAM
CoreMark quick measurement; its `-standard` counterpart is reserved for a
10-second hardware run. The nightly workflow reuses the IHP130 CI profile and
runs the quick CoreMark profile.
`ci/ihp130-xpi-flash-loader.mk` builds the SRAM-only XPI NOR service image used
by GDB/OpenOCD; it is a programming utility, not a normal boot application.
Start builds from a committed profile rather than setting an unreviewed mix of
variables on the command line.
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@@ -0,0 +1,15 @@
SOC := MINI
PDK := IHP130
HAVE_PLL := NO
HAVE_SRAM_IF := YES
HAVE_SRAM_MACRO := YES
PDK_BEHAV := YES
HAVE_SVA := NO
EXT_CLK_HZ := 72000000
AUD_CLK_HZ := 18432000
CLINT_TIMEBASE_HZ := 1000000
ISA := RV32IM
HAVE_CSR := NO
APP := xpi_flash_loader
FIRMWARE_NAME := retrosoc_xpi_flash_loader
LINK_TYPE := jtag_sram