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feat: refactor XPI integration and add programming tool
- Updated filelist to include new XPI source files. - Modified IRQ compatibility mapping for XPI in the SOC topology generator. - Adjusted JSON topology configuration to reflect new IRQ signal naming. - Changed software.mk to reference the new XPI HAL source file. - Enhanced APB4 peripheral module to include XPI IRQ signal. - Updated RTL style audit to include new XPI files. - Documented new XPI programming script in README. - Added a new script for programming XPI flash through OpenOCD. - Enhanced XPI IO testbench to validate new LUT engine and isolation behavior. - Created unit tests for the new XPI programming tool and its functionalities.
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@@ -12,6 +12,8 @@ profiles. The `ihp130-hazard3-coremark.mk` profile is the automated SRAM
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CoreMark quick measurement; its `-standard` counterpart is reserved for a
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10-second hardware run. The nightly workflow reuses the IHP130 CI profile and
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runs the quick CoreMark profile.
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`ci/ihp130-xpi-flash-loader.mk` builds the SRAM-only XPI NOR service image used
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by GDB/OpenOCD; it is a programming utility, not a normal boot application.
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Start builds from a committed profile rather than setting an unreviewed mix of
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variables on the command line.
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@@ -0,0 +1,15 @@
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SOC := MINI
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PDK := IHP130
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HAVE_PLL := NO
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HAVE_SRAM_IF := YES
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HAVE_SRAM_MACRO := YES
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PDK_BEHAV := YES
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HAVE_SVA := NO
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EXT_CLK_HZ := 72000000
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AUD_CLK_HZ := 18432000
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CLINT_TIMEBASE_HZ := 1000000
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ISA := RV32IM
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HAVE_CSR := NO
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APP := xpi_flash_loader
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FIRMWARE_NAME := retrosoc_xpi_flash_loader
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LINK_TYPE := jtag_sram
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