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Author	SHA1	Message	Date
maksyuki	a76836e9f7	feat: add fpga bsp constr file	2025-01-22 16:36:53 +08:00
maksyuki	5c1ecfaa68	fix: fix a dep chain in make script	2025-01-22 16:31:02 +08:00
maksyuki	9d9850cec2	chore: fixed untracked files	2025-01-22 16:25:10 +08:00
maksyuki	831e26c483	feat: change core clk into 50M	2025-01-22 14:04:47 +08:00
maksyuki	d6b5f55103	feat: add fpga top file and xdc script	2025-01-22 14:04:05 +08:00
maksyuki	1c33f5ae38	chore: modify link script and makefile impl	2025-01-22 12:25:32 +08:00
maksyuki	05f6607869	feat: modify the spram model impl	2025-01-22 12:24:32 +08:00
maksyuki	a32e4bac6a	style: format the name of signals	2025-01-22 11:09:59 +08:00
maksyuki	6e0bd6e292	feat: add yosys lib and synth scripts	2025-01-21 12:27:47 +08:00
maksyuki	bad3b05dfb	chore: rm unused error macro	2025-01-21 11:29:23 +08:00
maksyuki	c37e8104db	feat: use behv model to replace vendor io	2025-01-21 11:27:25 +08:00
maksyuki	41cb8742a1	style: format the soc and tb files	2025-01-21 11:20:10 +08:00
maksyuki	1b0caed2cb	chore: mv name from 'icebreaker' to 'retrosoc'	2025-01-21 10:59:57 +08:00
maksyuki	a137462a72	feat: add init core and soc files	2025-01-21 10:49:26 +08:00
maksyuki	b1817f069b	chore: add init ignore rule file	2025-01-21 10:45:10 +08:00
Miao Yuchi	ddfd7029f2	Initial commit	2025-01-02 16:25:42 +08:00