- Adjusted slot assignments in to reflect new peripheral mappings.
- Updated to validate new OpenC906 configurations, including generator and profile checks.
- Modified to reference the new Std-series VexiiRiscv generator.
- Changed cache maintenance instructions in to align with C906 specifications.
- Revised assertions in to account for internal unit removals.
- Updated to reflect changes in peripheral interface counts and policies.
- Added new test file to ensure preservation of the frozen HP configuration in the Std-series generator.
- Updated fault reference documentation to clarify Linux termination behavior and NPU-P6 requirements.
- Enhanced Linux runtime section with emphasis on platform setup and kernel handoff processes.
- Revised overview section to include detailed descriptions of NPU capabilities and memory configurations.
- Improved product use documentation to specify Linux rootfs behavior and acceptance checkpoints.
- Clarified reset summary to differentiate between Linux and smoke/NPU-P6 acceptance processes.
- Updated software section to reflect changes in Linux image loading and readiness protocols.
- Modified build scripts to support RV64 architecture and ensure proper ELF requirements.
- Enhanced NPU compiler to support cycle counting for RV64 and RV32 architectures.
- Added tests to validate new configurations and ensure compliance with updated publication contracts.
- Removed unsupported fault handling from and replaced it with a test for average pooling execution.
- Updated the test for unsupported placements to validate average pooling and depthwise convolution placements.
- Introduced new tests for softmax functionality in , including parameter validation and edge cases.
- Added qualification tests to ensure rejection of common-mode numerical errors and incomplete runs in .
- Enhanced RTL tests to cover memory downsizing and kernel burst capabilities in and .
- Adjusted boot status assertions in to reflect updated expected values.
- Introduced to validate AXI4 interface for 64-bit on-chip SRAM.
- Added to test resource controller functionality including ownership, IRQ handling, and cache handshake.
- Updated to include resource controller interface.
- Enhanced to cover additional IRQ scenarios.
- Added new tests in for AXI4 target guard timeout and isolation.
- Updated to reflect changes in the high-performance profile.
- Modified to verify on-chip SRAM bank configurations.
- Added for directed verification of resource controller.
- Updated to check SDRAM mapped window coverage.
- Enhanced to ensure correct IRQ mappings and APB target generation.
- Updated axi4_interconnect_tb to include an additional master and issue high-priority access tests.
- Introduced hp_mailbox_tb for testing the HP mailbox functionality, including register and doorbell operations.
- Added plic_tb to validate PLIC priority, claim, and completion mechanisms.
- Enhanced pll_ctrl_tb to initialize additional system control signals.
- Updated soc_irq_topology_tb to account for new IRQ sources and validate IRQ signal behavior.
- Improved sysctrl_tb to include tests for HP lifecycle control and status registers.
- Added tests for HP boot bundle layout, CRC, and payload validation.
- Introduced test_hp_mailbox.py for RTL regression testing of the HP mailbox.
- Added test_hp_platform.py to validate HP platform configuration and generated-source boundaries.
- Enhanced test_librelane_flow.py to ensure correct signal placement in chip configuration.
- Added performance log tests to validate LP and HP coremark ratios.
- Updated test_soc_topology.py to reflect changes in IRQ and peripheral mappings.
maksyuki