mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-06 14:55:14 +00:00
maksyuki
7eda4e6c46
- Enhanced the RTL style checker script to include new diagnostic rules for function declarations, primary design units, and synthesis exclusions. - Added functions to handle audit issues, ensuring that the audit records match the current inventory of RTL files. - Updated test cases to reflect changes in RTL file names and paths, ensuring consistency with the new naming conventions. - Introduced additional tests for style violations, including mismatched primary design units and synthesizable initial blocks. - Adjusted file paths in various test files to align with the new RTL structure and naming conventions.
74 lines
2.4 KiB
Python
74 lines
2.4 KiB
Python
"""DMA protocol regression tests."""
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from __future__ import annotations
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import shutil
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import subprocess
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import sys
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from pathlib import Path
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ROOT = Path(__file__).resolve().parents[1]
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def test_dma_reports_bus_errors_and_transfers_exact_word_count(tmp_path: Path) -> None:
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iverilog = shutil.which("iverilog")
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vvp = shutil.which("vvp")
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if iverilog is None or vvp is None:
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return
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memory_map = tmp_path / "memory_map"
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subprocess.run(
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[
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sys.executable,
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str(ROOT / "rtl/mini/address_map/generate_memory_map.py"),
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"--map",
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str(ROOT / "rtl/mini/address_map/memory_map.json"),
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"--output-dir",
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str(memory_map),
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"--have-sram-if",
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"NO",
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],
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check=True,
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)
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source_list = tmp_path / "dma_error.fl"
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source_list.write_text(
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"\n".join(
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[
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"+define+SV_ASSRT_DISABLE",
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f"+incdir+{memory_map / 'rtl'}",
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f"+incdir+{ROOT / 'rtl/managed/clusterip/common/rtl'}",
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f"+incdir+{ROOT / 'rtl/mini/top'}",
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str(ROOT / "rtl/managed/clusterip/common/rtl/interface/ribp_if.sv"),
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str(ROOT / "rtl/managed/clusterip/common/rtl/interface/axi4_stream_if.sv"),
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str(ROOT / "rtl/mini/top/rib_if.sv"),
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str(ROOT / "rtl/managed/clusterip/common/rtl/utils/register.sv"),
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str(ROOT / "rtl/managed/clusterip/common/rtl/utils/fifo.sv"),
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str(ROOT / "rtl/ip/peripheral/ribp_dma.sv"),
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str(ROOT / "rtl/ip/peripheral/dma_core.sv"),
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str(ROOT / "tests/rtl/dma_error_tb.sv"),
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"",
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]
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),
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encoding="utf-8",
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)
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converted = tmp_path / "dma_error_tb.v"
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subprocess.run(
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[
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sys.executable,
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str(ROOT / "rtl/mini/script/convt_sv2v.py"),
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"-f",
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str(source_list),
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"--output",
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str(converted),
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],
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check=True,
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)
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simulation = tmp_path / "dma_error_tb"
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subprocess.run(
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[iverilog, "-g2012", "-s", "dma_error_tb", "-o", str(simulation), str(converted)],
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check=True,
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)
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result = subprocess.run([vvp, str(simulation)], text=True, capture_output=True, check=True)
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assert "dma error, burst performance, and AXI4-Stream test passed" in result.stdout
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