mirror of
https://github.com/retroSoC/retroSoC.git
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- Updated NMI interface references from to in multiple files for consistency. - Added a new script to convert UART performance records into structured JSON format. - Enhanced the README documentation to include details about the new performance log parser. - Implemented tests for the new performance log parser to ensure correct functionality. - Added new test cases for DMA error handling and SDRAM data integrity to improve coverage. - Updated existing test cases to accommodate changes in the NMI interface and added performance metrics. - Refactored bus fault testbench to include fault code checks and improved error handling. - Adjusted memory map generation and pin mapping tests to reflect recent changes in RTL structure.
12 lines
294 B
Makefile
12 lines
294 B
Makefile
SOC := MINI
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CORE := HAZARD3
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PDK := IHP130
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HAVE_PLL := NO
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HAVE_SRAM_IF := YES
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HAVE_SRAM_MACRO := YES
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PDK_BEHAV := YES
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HAVE_SVA := NO
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ISA := RV32IM
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HAVE_CSR := NO
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APP := benchmark
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LINK_TYPE := ld2_sram
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