mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-05 06:32:37 +00:00
maksyuki
62d112c4e6
- Introduced to validate AXI4 interface for 64-bit on-chip SRAM. - Added to test resource controller functionality including ownership, IRQ handling, and cache handshake. - Updated to include resource controller interface. - Enhanced to cover additional IRQ scenarios. - Added new tests in for AXI4 target guard timeout and isolation. - Updated to reflect changes in the high-performance profile. - Modified to verify on-chip SRAM bank configurations. - Added for directed verification of resource controller. - Updated to check SDRAM mapped window coverage. - Enhanced to ensure correct IRQ mappings and APB target generation.
50 lines
1.4 KiB
Python
50 lines
1.4 KiB
Python
"""Directed verification for the Mini Resource Controller."""
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from __future__ import annotations
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import os
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import shutil
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import subprocess
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from pathlib import Path
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ROOT = Path(__file__).resolve().parents[1]
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def test_resource_controller_ownership_irq_and_cache_handshake(tmp_path: Path) -> None:
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verilator = shutil.which("verilator")
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if verilator is None:
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return
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output = tmp_path / "resource_controller_tb"
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ccache_tmp = tmp_path / "ccache"
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ccache_tmp.mkdir()
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subprocess.run(
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[
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verilator,
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"--binary",
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"--timing",
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"-Wno-fatal",
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"--top-module",
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"resource_controller_tb",
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"-I" + str(ROOT / "rtl/managed/clusterip/common/rtl/interface"),
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str(ROOT / "rtl/managed/clusterip/common/rtl/interface/apb4_if.sv"),
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str(ROOT / "rtl/mini/top/resource_controller.sv"),
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str(ROOT / "tests/rtl/resource_controller_tb.sv"),
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"-Mdir",
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str(tmp_path / "obj"),
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"-o",
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str(output),
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],
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check=True,
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text=True,
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capture_output=True,
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env={
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**os.environ,
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"CCACHE_DIR": str(ccache_tmp),
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"CCACHE_TEMPDIR": str(ccache_tmp),
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},
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)
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result = subprocess.run([output], check=True, text=True, capture_output=True)
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assert "Resource Controller ownership, IRQ, and cache handshake test passed" in result.stdout
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