mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-04 22:32:36 +00:00
maksyuki
31daf3e84c
Integrate the SPI-P2 shared-DMA ABI into the Tiny product: SPI0 at 0x1001D000 with IRQ25 and RCU target16, the four frozen Gen1 ALT routes, latched four-bit source qualification through the fabric and APB CDC, GPIO readiness/ownership guard, and the bounded rs_spi_* HAL with the TINY_SPI_P3_ACCEPTANCE ci_smoke image. Tiny DMA enables V2.2 requests 16/17 with exact fixed FIFO MMIO checks; Mini remains default-disabled and unchanged. Review closure: the DMA AXI4 master stages the origin channel with each burst so final and contended SPI alias bursts stay qualified, the RCU spare feedback bit is tied off for four-state simulators, and the clock-switch quiescence now includes the SPI session. Validation: full Pytest 2097 passed, 0 failed, 1 skipped (optional pypdf); both Tiny profiles pass the SPI-P3 Verilator acceptance (SIM_TEST_PASS cycles=1030088); R2-P7 Verilator acceptance, Mini DMA formal prove and cover, Mini/Tiny lint, Tiny Yosys synthesis, netsim-boot and OpenSTA pass; C format/policy/host tests and RTL format/style checks clean. Evidence and remaining obligations are recorded in docs/ip/spi-verification.md. Tiny Icarus behavioral remains blocked by the pre-existing observer/sv2v defect (routed to the R2 DV owners); Mini smoke synthesis host timeout is skipped per maintainer decision. Human phase acceptance and SPI-P4/P5 remain outstanding; phase_accepted stays false.
115 lines
5.1 KiB
Python
115 lines
5.1 KiB
Python
"""Focused SPI-P2 DMA V2.2 and credit-pacing checks."""
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from __future__ import annotations
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import re
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import shutil
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import subprocess
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from pathlib import Path
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ROOT = Path(__file__).resolve().parents[1]
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def test_dma_v22_abi_and_product_defaults():
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define = (ROOT / "rtl/ip/peripheral/dma_define.svh").read_text()
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pkg = (ROOT / "rtl/ip/peripheral/dma_pkg.sv").read_text()
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regs = (ROOT / "crt/include/retrosoc/hal/dma_regs.h").read_text()
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core = (ROOT / "rtl/ip/peripheral/dma_core.sv").read_text()
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tiny = (ROOT / "rtl/tiny/top/retrosoc_tiny.sv").read_text()
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assert "APB4_DMA__SUPPORTED_REQUESTS" in define
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assert "RS_DMA_REG_SUPPORTED_REQUESTS" in regs
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assert "DMA_REQUEST_SPI_TX = 5'd16" in pkg
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assert "DMA_REQUEST_SPI_RX = 5'd17" in pkg
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assert "s_tcd_word7_q[s_tcd_read_owner_q][25]" in core
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assert "logic [ NumChannels-1:0][ 4:0] s_req_q" in core
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assert "!EnableSpi && ((s_cfg_req[channel] == DMA_REQUEST_SPI_TX)" in core
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assert "s_tcd_parse_q &&" in core
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assert ".RequestMask" in tiny and "0003_39ff" in tiny
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assert ".EnableSpi(1'b1)" in re.sub(r"\s+", "", tiny)
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def test_dma_v22_tcd_request_split_is_handwritten_and_stable():
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c_header = (ROOT / "crt/include/retrosoc/hal/dma.h").read_text()
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c_math = (ROOT / "crt/src/hal/dma_math.c").read_text()
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c_dma = (ROOT / "crt/src/hal/dma.c").read_text()
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assert "RS_DMA_TCD_REQUEST_HIGH" in c_header
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assert "request |= UINT32_C(0x10)" in c_math
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assert "RS_DMA_TCD_REQUEST_HIGH" in c_dma
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def test_dma_v22_hal_mask_and_discovery_order():
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c_math = (ROOT / "crt/src/hal/dma_math.c").read_text()
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c_dma = (ROOT / "crt/src/hal/dma.c").read_text()
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core = (ROOT / "rtl/ip/peripheral/dma_core.sv").read_text()
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apb = (ROOT / "rtl/ip/peripheral/apb4_dma.sv").read_text()
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assert "UINT32_C(0x000339FF)" in c_math
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assert "RS_DMA_V22" not in c_math
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assert c_dma.index("rs_dma_supports_request(config->request)") < c_dma.index(
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"rs_dma_config_validate(channel, config)"
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)
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assert "s_cfg_req[channel] > DMA_REQUEST_SPI_RX" in core
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assert "s_cfg_req_raw[channel][31:5] != 27'd0" in core
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assert "32'h0003_ffff" in apb
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assert "EnableStreams ?" in apb
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def test_dma_stream_status_is_disabled_with_streams_off():
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core = (ROOT / "rtl/ip/peripheral/dma_core.sv").read_text()
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for request in (
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"DMA_REQUEST_I2S_TX",
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"DMA_REQUEST_I2S_RX",
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"DMA_REQUEST_DVP_RX",
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"DMA_REQUEST_CRYPTO_IN",
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"DMA_REQUEST_CRYPTO_OUT",
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):
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match = re.search(rf"s_req_ready\[{request}\]\s*=\s*([^;]+);", core)
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assert match is not None
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assert "EnableStreams" in match.group(1)
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def test_dma_v21_descriptor_cancel_guards_are_structural():
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core = (ROOT / "rtl/ip/peripheral/dma_core.sv").read_text()
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formal = (ROOT / "rtl/mini/formal/dma_formal_props.sv").read_text()
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harness = (ROOT / "rtl/mini/formal/dma_formal.sv").read_text()
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tcd_props = (ROOT / "rtl/mini/formal/dma_tcd_cancel_props.sv").read_text()
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fetch = core[core.index("s_tcd_fetch_pending_q[channel]"):core.index("always_comb begin", core.index("s_tcd_fetch_pending_q[channel]"))]
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parse_start = core.index("if (s_tcd_parse_q)")
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parse = core[parse_start:core.index("if (s_axi_read_beat_valid && s_read_owner_valid_q)", parse_start)]
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ownership = core[core.index("s_read_owns_channel = '0"):core.index("always_ff @(posedge clk_i", core.index("s_read_owns_channel = '0"))]
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assert "!s_abort_q[channel]" in fetch
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assert "!abort_i[channel]" in fetch
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assert "!s_tcd_parse_q" in fetch
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assert "if (s_abort_q[s_tcd_read_owner_q])" in parse
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assert "s_tcd_parse_q &&" in ownership
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assert "s_tcd_fetch_pending_q[channel] <= 1'b0" in core
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assert "tcd_read_owner_valid" in formal
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assert "tcd_word" in harness
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assert "cover (tcd_fetch_pending && abort_i[0])" in tcd_props
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assert "assume (tcd_mode)" in tcd_props
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def test_dma_v22_old_version_rejection_precedes_support_read():
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c_dma = (ROOT / "crt/src/hal/dma.c").read_text()
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start = c_dma.index("rs_status_t rs_dma_supports_request")
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body = c_dma[start:c_dma.index("static rs_status_t rs_dma_configure_owned", start)]
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assert body.index("version = RS_DMA_REG(RS_DMA_REG_IP_VERSION)") < body.index(
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"supported = RS_DMA_REG(RS_DMA_REG_SUPPORTED_REQUESTS)"
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)
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assert "version < RS_DMA_IP_VERSION_V22" in body
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def test_spi_dma_pacing_fixture(tmp_path):
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iverilog = shutil.which("iverilog")
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vvp = shutil.which("vvp")
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assert iverilog and vvp
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common = ROOT / "rtl/managed/clusterip/common/rtl"
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sim = tmp_path / "spi_dma_pacing_tb"
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subprocess.run([
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iverilog, "-g2012", "-s", "spi_dma_pacing_tb", "-o", str(sim),
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f"-I{common}", f"-I{common / 'utils'}", str(common / "utils/register.sv"),
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str(ROOT / "rtl/ip/serial/spi_dma_pacing.sv"),
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str(ROOT / "tests/rtl/spi_dma_pacing_tb.sv")],
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check=True, capture_output=True, text=True)
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run = subprocess.run([vvp, str(sim)], check=True, capture_output=True, text=True)
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assert "SPI_P2_PASS spi_dma_pacing_tb" in run.stdout
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assert not re.search(r"FAILED|FATAL|SIM_TEST_TIMEOUT", run.stdout + run.stderr)
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