mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-04 22:32:36 +00:00
maksyuki
39bc1c84b4
- Implemented tests for the deterministic baseline JPEG reference model in , covering encoding, decoding, quality scaling, and error handling. - Created to ensure synchronization between RTL and C register constants for JPEG. - Updated to reflect changes in the number of APB interfaces and IRQ mappings, ensuring the topology generates correct bindings.
96 lines
3.0 KiB
Systemverilog
96 lines
3.0 KiB
Systemverilog
// Copyright (c) 2026 Yuchi Miao <miaoyuchi@ict.ac.cn>
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// retroSoC is licensed under Mulan PSL v2.
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module jpeg_entropy_decoder_tb;
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logic clk = 1'b0;
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logic rst_n = 1'b0;
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logic start;
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logic signed [ 23:0] previous_dc;
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logic [ 191:0] dc_code;
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logic [ 59:0] dc_length;
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logic [4095:0] ac_code;
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logic [1279:0] ac_length;
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logic [ 31:0] bit_window;
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logic [ 5:0] bit_count;
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logic [ 5:0] bit_consume;
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logic bit_consume_valid;
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logic start_ready;
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logic [1535:0] block_out;
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logic signed [ 23:0] dc_out;
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logic result_valid;
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logic result_ready;
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logic error_flag;
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always #5 clk = ~clk;
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jpeg_entropy_decoder u_dut (
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.clk_i (clk),
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.rst_n_i (rst_n),
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.start_i (start),
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.previous_dc_i (previous_dc),
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.dc_code_i (dc_code),
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.dc_length_i (dc_length),
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.ac_code_i (ac_code),
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.ac_length_i (ac_length),
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.bit_window_i (bit_window),
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.bit_count_i (bit_count),
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.bit_consume_o (bit_consume),
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.bit_consume_valid_o(bit_consume_valid),
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.start_ready_o (start_ready),
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.block_o (block_out),
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.dc_o (dc_out),
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.result_valid_o (result_valid),
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.result_ready_i (result_ready),
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.error_o (error_flag)
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);
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always @(posedge clk) begin
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if (rst_n && bit_consume_valid) begin
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bit_window <= bit_window << bit_consume;
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bit_count <= bit_count - bit_consume;
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end
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end
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initial begin
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start = 1'b0;
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previous_dc = 24'sd2;
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dc_code = '0;
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dc_length = '0;
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ac_code = '0;
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ac_length = '0;
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bit_window = {23'b10111_1110_1110_1110_101011, 9'd0};
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bit_count = 6'd23;
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result_ready = 1'b0;
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dc_code[2*16+:16] = 16'b101;
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dc_length[2*5+:5] = 5'd3;
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ac_code[8'hf0*16+:16] = 16'b1110;
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ac_length[8'hf0*5+:5] = 5'd4;
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ac_code[8'he1*16+:16] = 16'b10101;
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ac_length[8'he1*5+:5] = 5'd5;
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repeat (3) @(posedge clk);
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rst_n = 1'b1;
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@(negedge clk);
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start = 1'b1;
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@(negedge clk);
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start = 1'b0;
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while (!result_valid) @(negedge clk);
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if (error_flag || dc_out != 24'sd5 || $signed(
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block_out[0+:24]
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) != 24'sd5 || $signed(
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block_out[63*24+:24]
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) != 24'sd1 || bit_count != 6'd0) begin
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$fatal(1, "entropy decode mismatch: err=%0d dc=%0d last=%0d bits=%0d", error_flag, dc_out,
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$signed(block_out[63*24+:24]), bit_count);
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end
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for (int index = 1; index < 63; index++) begin
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if ($signed(block_out[index*24+:24]) != 24'sd0) begin
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$fatal(1, "unexpected coefficient at %0d", index);
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end
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end
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result_ready = 1'b1;
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@(negedge clk);
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$display("JPEG entropy decoder tests passed");
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$finish;
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end
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endmodule
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