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3ac9e73ab95d1186a72e68de10857441700000b0
retroSoC/publications/datasheets/register-annotations.json
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maksyuki 3ac9e73ab9 feat: refactor tests for mailbox and environment validation 
- Updated mailbox purpose tests to reflect new write order and sequence handling.
- Added tests to ensure Linux-ready values match LP contract and constants match Linux helper.
- Introduced tests to verify that offset changes do not hide stale Linux helpers.
- Enhanced environment tests to report current locked launcher and runtime versions.
- Added checks for SBT launcher presence in environment labels.
- Improved full diagram tests to validate storage geometry and RSA vector configurations.
- Expanded register tests to ensure crypto interrupt registers publish all events and lifecycle annotations preserve security boundaries.
- Modified script tools tests to include Vexii generation validation and updated workflow assertions.
2026-09-30 10:51:04 +08:00

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{
"uart": {
"main.TXDATA": {
"fields": [
{
"lsb": 0,
"msb": 7,
"name": "DATA",
"description": "Push one character from bits 7:0.",
"reset": "Not retained",
"expression": "write data"
},
{
"lsb": 8,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "zero"
}
],
"reset": "Not retained (command/data port)"
},
"main.FIFO_CTRL": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "TX_FLUSH",
"description": "Tx flush.",
"reset": "Register reset applies",
"expression": "`UART_FIFO_CTRL_TX_FLUSH"
},
{
"lsb": 1,
"msb": 1,
"name": "RX_FLUSH",
"description": "Rx flush.",
"reset": "Register reset applies",
"expression": "`UART_FIFO_CTRL_RX_FLUSH"
},
{
"lsb": 2,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
},
"main.INTR_TEST": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "RX_WATERMARK",
"description": "Rx watermark.",
"reset": "Register reset applies",
"expression": "`UART_INTR_RX_WATERMARK"
},
{
"lsb": 1,
"msb": 1,
"name": "RX_TIMEOUT",
"description": "Rx timeout.",
"reset": "Register reset applies",
"expression": "`UART_INTR_RX_TIMEOUT"
},
{
"lsb": 2,
"msb": 2,
"name": "TX_WATERMARK",
"description": "Tx watermark.",
"reset": "Register reset applies",
"expression": "`UART_INTR_TX_WATERMARK"
},
{
"lsb": 3,
"msb": 3,
"name": "TX_DONE",
"description": "Tx done.",
"reset": "Register reset applies",
"expression": "`UART_INTR_TX_DONE"
},
{
"lsb": 4,
"msb": 4,
"name": "RX_ERROR",
"description": "Rx error.",
"reset": "Register reset applies",
"expression": "`UART_INTR_RX_ERROR"
},
{
"lsb": 5,
"msb": 5,
"name": "BREAK",
"description": "Break.",
"reset": "Register reset applies",
"expression": "`UART_INTR_BREAK"
},
{
"lsb": 6,
"msb": 6,
"name": "CTS_CHANGE",
"description": "Cts change.",
"reset": "Register reset applies",
"expression": "`UART_INTR_CTS_CHANGE"
},
{
"lsb": 7,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
}
},
"i2c": {
"main.COMMAND": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "ABORT",
"description": "Abort.",
"reset": "Register reset applies",
"expression": "`I2C_COMMAND_ABORT"
},
{
"lsb": 1,
"msb": 1,
"name": "RECOVER",
"description": "Recover.",
"reset": "Register reset applies",
"expression": "`I2C_COMMAND_RECOVER"
},
{
"lsb": 2,
"msb": 2,
"name": "CMD_FLUSH",
"description": "Cmd flush.",
"reset": "Register reset applies",
"expression": "`I2C_COMMAND_CMD_FLUSH"
},
{
"lsb": 3,
"msb": 3,
"name": "RX_FLUSH",
"description": "Rx flush.",
"reset": "Register reset applies",
"expression": "`I2C_COMMAND_RX_FLUSH"
},
{
"lsb": 4,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
},
"main.INTR_TEST": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "DONE",
"description": "Done.",
"reset": "Register reset applies",
"expression": "`I2C_INTR_DONE"
},
{
"lsb": 1,
"msb": 1,
"name": "CMD_WATERMARK",
"description": "Cmd watermark.",
"reset": "Register reset applies",
"expression": "`I2C_INTR_CMD_WATERMARK"
},
{
"lsb": 2,
"msb": 2,
"name": "RX_WATERMARK",
"description": "Rx watermark.",
"reset": "Register reset applies",
"expression": "`I2C_INTR_RX_WATERMARK"
},
{
"lsb": 3,
"msb": 3,
"name": "NACK",
"description": "Nack.",
"reset": "Register reset applies",
"expression": "`I2C_INTR_NACK"
},
{
"lsb": 4,
"msb": 4,
"name": "ARB_LOST",
"description": "Arb lost.",
"reset": "Register reset applies",
"expression": "`I2C_INTR_ARB_LOST"
},
{
"lsb": 5,
"msb": 5,
"name": "TIMEOUT",
"description": "Timeout.",
"reset": "Register reset applies",
"expression": "`I2C_INTR_TIMEOUT"
},
{
"lsb": 6,
"msb": 6,
"name": "ERROR",
"description": "Error.",
"reset": "Register reset applies",
"expression": "`I2C_INTR_ERROR"
},
{
"lsb": 7,
"msb": 7,
"name": "RECOVERY_DONE",
"description": "Recovery done.",
"reset": "Register reset applies",
"expression": "`I2C_INTR_RECOVERY_DONE"
},
{
"lsb": 8,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
},
"main.DATA_CMD": {
"fields": [
{
"name": "DATA",
"lsb": 0,
"msb": 7,
"description": "Byte to transmit; ignored for a read command.",
"reset": "Register reset applies",
"expression": "reviewed field"
},
{
"name": "READ",
"lsb": 8,
"msb": 8,
"description": "Read one byte instead of transmitting DATA.",
"reset": "Register reset applies",
"expression": "reviewed field"
},
{
"name": "RESTART",
"lsb": 9,
"msb": 9,
"description": "Issue START/repeated START before this byte.",
"reset": "Register reset applies",
"expression": "reviewed field"
},
{
"name": "STOP",
"lsb": 10,
"msb": 10,
"description": "Issue STOP after this command.",
"reset": "Register reset applies",
"expression": "reviewed field"
},
{
"name": "NACK_LAST",
"lsb": 11,
"msb": 11,
"description": "Return NACK for the final received byte.",
"reset": "Register reset applies",
"expression": "reviewed field"
},
{
"name": "Reserved",
"lsb": 12,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0",
"expression": "reserved"
}
],
"access": "WO",
"reset": "Not retained"
},
"main.CMD_WATERMARK": {
"reset": "4"
},
"main.RX_WATERMARK": {
"reset": "8"
}
},
"i2s": {
"main.COMMAND": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "TX_FLUSH",
"description": "Tx flush.",
"reset": "Register reset applies",
"expression": "`APB4_I2S__COMMAND_TX_FLUSH"
},
{
"lsb": 1,
"msb": 1,
"name": "RX_FLUSH",
"description": "Rx flush.",
"reset": "Register reset applies",
"expression": "`APB4_I2S__COMMAND_RX_FLUSH"
},
{
"lsb": 2,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
},
"main.TXDATA": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "DATA",
"description": "PIO TX word when stream TX is disabled.",
"reset": "Not retained",
"expression": "write data"
}
],
"reset": "Not retained (command/data port)"
},
"main.INTR_TEST": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "TX_LOW",
"description": "Tx low.",
"reset": "Register reset applies",
"expression": "`APB4_I2S__INTR_TX_LOW"
},
{
"lsb": 1,
"msb": 1,
"name": "RX_HIGH",
"description": "Rx high.",
"reset": "Register reset applies",
"expression": "`APB4_I2S__INTR_RX_HIGH"
},
{
"lsb": 2,
"msb": 2,
"name": "TX_UNDERRUN",
"description": "Tx underrun.",
"reset": "Register reset applies",
"expression": "`APB4_I2S__INTR_TX_UNDERRUN"
},
{
"lsb": 3,
"msb": 3,
"name": "RX_OVERRUN",
"description": "Rx overrun.",
"reset": "Register reset applies",
"expression": "`APB4_I2S__INTR_RX_OVERRUN"
},
{
"lsb": 4,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
},
"main.CTRL": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "ENABLE",
"description": "Enable.",
"reset": "0x0",
"expression": "`APB4_I2S__CTRL_ENABLE"
},
{
"lsb": 1,
"msb": 1,
"name": "TX_ENABLE",
"description": "Tx enable.",
"reset": "0x0",
"expression": "`APB4_I2S__CTRL_TX_ENABLE"
},
{
"lsb": 2,
"msb": 2,
"name": "RX_ENABLE",
"description": "Rx enable.",
"reset": "0x0",
"expression": "`APB4_I2S__CTRL_RX_ENABLE"
},
{
"lsb": 3,
"msb": 3,
"name": "LOOPBACK",
"description": "Loopback.",
"reset": "0x0",
"expression": "`APB4_I2S__CTRL_LOOPBACK"
},
{
"lsb": 4,
"msb": 4,
"name": "CLK_PROG",
"description": "Clk prog.",
"reset": "0x0",
"expression": "`APB4_I2S__CTRL_CLK_PROG"
},
{
"lsb": 5,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0x0",
"expression": "s_ctrl_q"
}
]
},
"main.STREAM_CTRL": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "STREAM_TX_ENABLE",
"description": "Stream tx enable.",
"reset": "0x0",
"expression": "s_stream_q[`APB4_I2S__STREAM_TX]"
},
{
"lsb": 1,
"msb": 1,
"name": "STREAM_RX_ENABLE",
"description": "Stream rx enable.",
"reset": "0x0",
"expression": "s_stream_q[`APB4_I2S__STREAM_RX]"
},
{
"lsb": 2,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0x0",
"expression": "s_stream_q"
}
]
}
},
"ws2812": {
"main.TXDATA": {
"fields": [
{
"lsb": 0,
"msb": 23,
"name": "DATA",
"description": "Push one 24-bit GRB word into the FIFO. Bits 31:24 must be zero in software.",
"reset": "Not retained",
"expression": "write data"
},
{
"lsb": 24,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "zero"
}
],
"reset": "Not retained (command/data port)"
},
"main.CTRL": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "START",
"description": "Start.",
"reset": "Register reset applies",
"expression": "`WS2812_CTRL_START"
},
{
"lsb": 1,
"msb": 1,
"name": "ABORT",
"description": "Abort.",
"reset": "Register reset applies",
"expression": "`WS2812_CTRL_ABORT"
},
{
"lsb": 2,
"msb": 2,
"name": "FIFO_FLUSH",
"description": "Fifo flush.",
"reset": "Register reset applies",
"expression": "`WS2812_CTRL_FIFO_FLUSH"
},
{
"lsb": 3,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
},
"main.INTR_TEST": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "DONE",
"description": "Done.",
"reset": "Register reset applies",
"expression": "`WS2812_INTR_DONE"
},
{
"lsb": 1,
"msb": 1,
"name": "FIFO_LOW",
"description": "Fifo low.",
"reset": "Register reset applies",
"expression": "`WS2812_INTR_FIFO_LOW"
},
{
"lsb": 2,
"msb": 2,
"name": "ERROR",
"description": "Error.",
"reset": "Register reset applies",
"expression": "`WS2812_INTR_ERROR"
},
{
"lsb": 3,
"msb": 3,
"name": "ABORTED",
"description": "Aborted.",
"reset": "Register reset applies",
"expression": "`WS2812_INTR_ABORTED"
},
{
"lsb": 4,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
},
"main.FIFO_LEVEL": {
"fields": [
{
"name": "COUNT",
"lsb": 0,
"msb": 4,
"description": "Current number of queued 24-bit GRB words; valid range 0 through 16.",
"reset": "0x0",
"expression": "reviewed field"
},
{
"name": "Reserved",
"lsb": 5,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0x0",
"expression": "reserved"
}
],
"access": "RO",
"reset": "0"
},
"main.FIFO_WATERMARK": {
"reset": "4"
}
},
"dma": {
"main.GLOBAL_CTRL": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "RESET",
"description": "Reset.",
"reset": "Register reset applies",
"expression": "`APB4_DMA__GLOBAL_CTRL_RESET"
},
{
"lsb": 1,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
},
"ch.CTRL": {
"fields": [
{
"name": "START",
"lsb": 0,
"msb": 0,
"description": "Write one to request start.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "SUSPEND",
"lsb": 1,
"msb": 1,
"description": "Write one to request suspend.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "RESUME",
"lsb": 2,
"msb": 2,
"description": "Write one to request resume.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "ABORT",
"lsb": 3,
"msb": 3,
"description": "Write one to request abort.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "RESET",
"lsb": 4,
"msb": 4,
"description": "Write one to request reset.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 5,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"access": "WO",
"reset": "Not retained"
}
},
"sysctrl": {
"main.PLL_CMD": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "APPLY",
"description": "Apply.",
"reset": "Register reset applies",
"expression": "`APB4_SYSCTRL__PLL_CMD_APPLY"
},
{
"lsb": 1,
"msb": 1,
"name": "CLEAR_ERROR",
"description": "Clear error.",
"reset": "Register reset applies",
"expression": "`APB4_SYSCTRL__PLL_CMD_CLEAR_ERROR"
},
{
"lsb": 2,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
},
"main.PERF_USB2_WAIT_LO": {
"description": "USB2 wait-cycle counter low word; use the snapshot sequence for a coherent 64-bit value.",
"access": "RO"
},
"main.PERF_USB2_WAIT_HI": {
"description": "USB2 wait-cycle counter high word; use the snapshot sequence for a coherent 64-bit value.",
"access": "RO"
},
"clock.CLK_HP_CURRENT": {
"reset": "0",
"notes": "This initial value applies to the associated AON/root reset, not every downstream APB reset."
},
"clock.CLK_LP_CFG": {
"reset": "0",
"notes": "This initial value applies to the associated AON/root reset, not every downstream APB reset."
},
"clock.CLK_PCLK_CFG": {
"reset": "0",
"notes": "This initial value applies to the associated AON/root reset, not every downstream APB reset."
},
"clock.CLK_STATUS": {
"reset": "0",
"notes": "This initial value applies to the associated AON/root reset, not every downstream APB reset."
},
"clock.CLK_FAULT": {
"reset": "0",
"notes": "This initial value applies to the associated AON/root reset, not every downstream APB reset."
},
"clock.CLK_GATE": {
"reset": "0",
"notes": "This initial value applies to the associated AON/root reset, not every downstream APB reset."
},
"clock.MEM_PAD_FAULT": {
"reset": "0",
"notes": "This initial value applies to the associated AON/root reset, not every downstream APB reset."
},
"clock.MEM_PAD_CTRL": {
"reset": "1",
"notes": "The AON reset selects QPI mode; mode and lock may survive downstream resets."
},
"clock.MEM_PAD_STATUS": {
"reset": "9",
"notes": "Reset: present=1, QPI mode=1, lock=0, fault=0."
}
},
"psram": {
"main.COMMAND": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "INIT",
"description": "Init.",
"reset": "Register reset applies",
"expression": "`PSRAM_COMMAND_INIT"
},
{
"lsb": 1,
"msb": 1,
"name": "RECOVER",
"description": "Recover.",
"reset": "Register reset applies",
"expression": "`PSRAM_COMMAND_RECOVER"
},
{
"lsb": 2,
"msb": 2,
"name": "ABORT",
"description": "Abort.",
"reset": "Register reset applies",
"expression": "`PSRAM_COMMAND_ABORT"
},
{
"lsb": 3,
"msb": 7,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
},
{
"lsb": 8,
"msb": 31,
"name": "CHIP",
"description": "Chip.",
"reset": "Register reset applies",
"expression": "`PSRAM_COMMAND_CHIP_LSB"
}
],
"reset": "Not retained (command/data port)"
},
"main.INTR_TEST": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "INIT_DONE",
"description": "Init done.",
"reset": "Register reset applies",
"expression": "`PSRAM_INTR_INIT_DONE"
},
{
"lsb": 1,
"msb": 1,
"name": "INDIRECT_DONE",
"description": "Indirect done.",
"reset": "Register reset applies",
"expression": "`PSRAM_INTR_INDIRECT_DONE"
},
{
"lsb": 2,
"msb": 2,
"name": "ERROR",
"description": "Error.",
"reset": "Register reset applies",
"expression": "`PSRAM_INTR_ERROR"
},
{
"lsb": 3,
"msb": 3,
"name": "TIMEOUT",
"description": "Timeout.",
"reset": "Register reset applies",
"expression": "`PSRAM_INTR_TIMEOUT"
},
{
"lsb": 4,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
},
"main.INDIRECT_CTRL": {
"fields": [
{
"name": "COMMAND",
"lsb": 0,
"msb": 3,
"description": "Restricted indirect command selector.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 4,
"msb": 7,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
},
{
"name": "CHIP",
"lsb": 8,
"msb": 9,
"description": "Select one of four PSRAM devices.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 10,
"msb": 15,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
},
{
"name": "LENGTH_MINUS_ONE",
"lsb": 16,
"msb": 18,
"description": "Transfer length minus one, for one through eight bytes.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 19,
"msb": 30,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
},
{
"name": "START",
"lsb": 31,
"msb": 31,
"description": "Write-one indirect-start pulse; reads as zero.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
}
],
"reset": "0"
},
"main.CTRL": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "CONTROLLER_ENABLE",
"description": "Controller enable.",
"reset": "0x1",
"expression": "s_ctrl_q[`PSRAM_CTRL_ENABLE]"
},
{
"lsb": 1,
"msb": 1,
"name": "MEMORY_ENABLE",
"description": "Memory enable.",
"reset": "0x1",
"expression": "s_ctrl_q[`PSRAM_CTRL_MEMORY_ENABLE]"
},
{
"lsb": 2,
"msb": 2,
"name": "AUTO_INIT",
"description": "Auto init.",
"reset": "0x0",
"expression": "s_ctrl_q[`PSRAM_CTRL_AUTO_INIT]"
},
{
"lsb": 3,
"msb": 3,
"name": "WRAP32",
"description": "Wrap32.",
"reset": "0x0",
"expression": "s_ctrl_q[`PSRAM_CTRL_WRAP32]"
},
{
"lsb": 4,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0x0",
"expression": "s_ctrl_q"
}
]
},
"main.CLK_CONFIG": {
"fields": [
{
"lsb": 0,
"msb": 15,
"name": "HALF_PERIOD",
"description": "Half period.",
"reset": "0x1",
"expression": "s_clk_config_q[15:0]"
},
{
"lsb": 16,
"msb": 16,
"name": "ABOVE_84MHZ",
"description": "Above 84mhz.",
"reset": "0x0",
"expression": "s_clk_config_q[`PSRAM_CLK_ABOVE_84MHZ]"
},
{
"lsb": 17,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0x0",
"expression": "s_clk_config_q"
}
]
}
},
"opipsram": {
"main.COMMAND": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "INIT",
"description": "Init.",
"reset": "Register reset applies",
"expression": "`APB4_OPIPSRAM__COMMAND_INIT"
},
{
"lsb": 1,
"msb": 1,
"name": "ABORT",
"description": "Abort.",
"reset": "Register reset applies",
"expression": "`APB4_OPIPSRAM__COMMAND_ABORT"
},
{
"lsb": 2,
"msb": 2,
"name": "SOFT_RESET",
"description": "Soft reset.",
"reset": "Register reset applies",
"expression": "`APB4_OPIPSRAM__COMMAND_SOFT_RESET"
},
{
"lsb": 3,
"msb": 3,
"name": "TRAIN",
"description": "Train.",
"reset": "Register reset applies",
"expression": "`APB4_OPIPSRAM__COMMAND_TRAIN"
},
{
"lsb": 4,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
},
"main.INTR_TEST": {
"fields": [
{
"name": "INIT_DONE",
"lsb": 0,
"msb": 0,
"description": "Write one to request init done.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "INDIRECT_DONE",
"lsb": 1,
"msb": 1,
"description": "Write one to request indirect done.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "TRAIN_DONE",
"lsb": 2,
"msb": 2,
"description": "Write one to request train done.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "ERROR",
"lsb": 3,
"msb": 3,
"description": "Write one to request error.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "TIMEOUT",
"lsb": 4,
"msb": 4,
"description": "Write one to request timeout.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 5,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"access": "WO",
"reset": "Not retained"
},
"main.INDIRECT_CTRL": {
"fields": [
{
"name": "WRITE",
"lsb": 0,
"msb": 0,
"description": "Write transaction when set; read otherwise.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "REGISTER",
"lsb": 1,
"msb": 1,
"description": "Select register space instead of memory space.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 2,
"msb": 3,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
},
{
"name": "LENGTH",
"lsb": 4,
"msb": 7,
"description": "Indirect transfer byte length.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "START",
"lsb": 8,
"msb": 8,
"description": "Submit an indirect command.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 9,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"reset": "0"
},
"main.CTRL": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "CONTROLLER_ENABLE",
"description": "Controller enable.",
"reset": "0x0",
"expression": "s_ctrl_q[`APB4_OPIPSRAM__CTRL_ENABLE]"
},
{
"lsb": 1,
"msb": 1,
"name": "MEMORY_ENABLE",
"description": "Memory enable.",
"reset": "0x0",
"expression": "s_ctrl_q[`APB4_OPIPSRAM__CTRL_MEMORY_ENABLE]"
},
{
"lsb": 2,
"msb": 2,
"name": "AUTO_INIT",
"description": "Auto init.",
"reset": "0x0",
"expression": "s_ctrl_q[`APB4_OPIPSRAM__CTRL_AUTO_INIT]"
},
{
"lsb": 3,
"msb": 3,
"name": "LINE_BUFFER",
"description": "Line buffer.",
"reset": "0x0",
"expression": "s_ctrl_q[`APB4_OPIPSRAM__CTRL_LINE_BUFFER]"
},
{
"lsb": 4,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0x0",
"expression": "s_ctrl_q"
}
]
}
},
"jpeg": {
"main.COMMAND": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "START",
"description": "Start.",
"reset": "Register reset applies",
"expression": "`APB4_JPEG__COMMAND_START"
},
{
"lsb": 1,
"msb": 1,
"name": "ABORT",
"description": "Abort.",
"reset": "Register reset applies",
"expression": "`APB4_JPEG__COMMAND_ABORT"
},
{
"lsb": 2,
"msb": 2,
"name": "SOFT_RESET",
"description": "Soft reset.",
"reset": "Register reset applies",
"expression": "`APB4_JPEG__COMMAND_SOFT_RESET"
},
{
"lsb": 3,
"msb": 3,
"name": "RING_KICK",
"description": "Ring kick.",
"reset": "Register reset applies",
"expression": "`APB4_JPEG__COMMAND_RING_KICK"
},
{
"lsb": 4,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)",
"access": "WO"
},
"main.IRQ_TEST": {
"fields": [
{
"name": "JOB_DONE",
"lsb": 0,
"msb": 0,
"description": "Write one to request job done.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "RING_EVENT",
"lsb": 1,
"msb": 1,
"description": "Write one to request ring event.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "HEADER_READY",
"lsb": 2,
"msb": 2,
"description": "Write one to request header ready.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "ABORT_DONE",
"lsb": 3,
"msb": 3,
"description": "Write one to request abort done.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "ERROR",
"lsb": 4,
"msb": 4,
"description": "Write one to request error.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 5,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"access": "WO",
"reset": "Not retained"
},
"main.TABLE_COMMAND": {
"fields": [
{
"name": "COMMIT",
"lsb": 0,
"msb": 0,
"description": "Write one to request commit.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "DEFAULT",
"lsb": 1,
"msb": 1,
"description": "Write one to request default.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "CLEAR",
"lsb": 2,
"msb": 2,
"description": "Write one to request clear.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 3,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"access": "WO",
"reset": "Not retained"
},
"main.DOORBELL": {
"fields": [
{
"name": "KICK",
"lsb": 0,
"msb": 0,
"description": "Notify the ring scheduler that a producer has published work.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 1,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"access": "WO",
"reset": "Not retained"
},
"main.CYCLES_LO": {
"access": "RO"
},
"main.CYCLES_HI": {
"access": "RO"
},
"main.PIXELS": {
"access": "RO"
},
"main.INPUT_BYTES": {
"access": "RO"
},
"main.OUTPUT_BYTES": {
"access": "RO"
},
"main.READ_STALL": {
"access": "RO"
},
"main.WRITE_STALL": {
"access": "RO"
},
"main.RING_HEAD": {
"access": "RO"
},
"main.RING_STATUS": {
"access": "RO"
},
"main.TABLE_STATUS": {
"access": "RO"
},
"main.ERROR_STATUS": {
"fields": [
{
"name": "VALID",
"lsb": 0,
"msb": 0,
"description": "Sticky first-error valid bit; write one to clear.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "CODE",
"lsb": 1,
"msb": 5,
"description": "Error code.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "STAGE",
"lsb": 6,
"msb": 9,
"description": "Failing codec/transport stage.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "AXI_RESPONSE",
"lsb": 10,
"msb": 11,
"description": "AXI response code for bus faults.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 12,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"access": "RW1C",
"reset": "0"
},
"main.IP_ID": {
"access": "RO"
},
"main.IP_VERSION": {
"access": "RO"
},
"main.CAPABILITY0": {
"access": "RO"
},
"main.CAPABILITY1": {
"access": "RO"
},
"main.STATUS": {
"access": "RO"
},
"main.IRQ_STATE": {
"access": "RW1C"
},
"main.IRQ_ENABLE": {
"access": "RW"
},
"main.ERROR_ADDRESS": {
"access": "RO"
},
"main.ERROR_DETAIL": {
"access": "RO"
},
"main.PERF_CONTROL": {
"access": "RW"
},
"main.JOB_CONFIG": {
"access": "RW"
},
"main.IMAGE_SIZE": {
"access": "RW",
"fields": [
{
"lsb": 0,
"msb": 15,
"name": "WIDTH",
"description": "Image width in pixels; valid jobs are 1 through 2048.",
"reset": "Register reset applies",
"expression": "rtl/ip/multimedia/apb4_jpeg.sv"
},
{
"lsb": 16,
"msb": 31,
"name": "HEIGHT",
"description": "Image height in pixels; valid jobs are 1 through 2048.",
"reset": "Register reset applies",
"expression": "rtl/ip/multimedia/apb4_jpeg.sv"
}
],
"review_source": "rtl/ip/multimedia/apb4_jpeg.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06."
},
"main.INPUT_FORMAT": {
"access": "RW",
"fields": [
{
"lsb": 0,
"msb": 2,
"name": "FORMAT",
"description": "0: Gray8; 1: RGB565; 2: RGB888; 3: YUYV422; 4: NV12. Other encodings are unsupported.",
"reset": "Register reset applies",
"expression": "rtl/ip/multimedia/apb4_jpeg.sv"
},
{
"lsb": 3,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/multimedia/apb4_jpeg.sv"
}
],
"review_source": "rtl/ip/multimedia/apb4_jpeg.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06."
},
"main.OUTPUT_FORMAT": {
"access": "RW",
"fields": [
{
"lsb": 0,
"msb": 2,
"name": "FORMAT",
"description": "0: Gray8; 1: RGB565; 2: RGB888; 3: YUYV422; 4: NV12. Other encodings are unsupported.",
"reset": "Register reset applies",
"expression": "rtl/ip/multimedia/apb4_jpeg.sv"
},
{
"lsb": 3,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/multimedia/apb4_jpeg.sv"
}
],
"review_source": "rtl/ip/multimedia/apb4_jpeg.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06."
},
"main.ENCODE_CONFIG": {
"access": "RW",
"fields": [
{
"lsb": 0,
"msb": 7,
"name": "QUALITY",
"description": "Retained SDK quality request. The implemented datapath obtains quantization from the loaded table context; this byte does not generate quality tables.",
"reset": "Register reset applies",
"expression": "rtl/ip/multimedia/apb4_jpeg.sv"
},
{
"lsb": 8,
"msb": 9,
"name": "SAMPLING",
"description": "0: grayscale; 1: 4:4:4; 2: 4:2:2; 3: 4:2:0.",
"reset": "Register reset applies",
"expression": "rtl/ip/multimedia/apb4_jpeg.sv"
},
{
"lsb": 10,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/multimedia/apb4_jpeg.sv"
}
],
"review_source": "rtl/ip/multimedia/apb4_jpeg.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06."
},
"main.RESTART_INTERVAL": {
"access": "RW"
},
"main.BITSTREAM_ADDR": {
"access": "RW"
},
"main.BITSTREAM_SIZE": {
"access": "RW"
},
"main.PLANE0_ADDR": {
"access": "RW"
},
"main.PLANE0_STRIDE": {
"access": "RW"
},
"main.PLANE1_ADDR": {
"access": "RW"
},
"main.PLANE1_STRIDE": {
"access": "RW"
},
"main.PLANE2_ADDR": {
"access": "RW"
},
"main.PLANE2_STRIDE": {
"access": "RW"
},
"main.METADATA_ADDR": {
"access": "RW"
},
"main.METADATA_LENGTH": {
"access": "RW"
},
"main.RESULT_SIZE": {
"access": "RO"
},
"main.RESULT_IMAGE_SIZE": {
"access": "RO",
"fields": [
{
"lsb": 0,
"msb": 15,
"name": "WIDTH",
"description": "Image width in pixels; valid jobs are 1 through 2048.",
"reset": "Register reset applies",
"expression": "rtl/ip/multimedia/apb4_jpeg.sv"
},
{
"lsb": 16,
"msb": 31,
"name": "HEIGHT",
"description": "Image height in pixels; valid jobs are 1 through 2048.",
"reset": "Register reset applies",
"expression": "rtl/ip/multimedia/apb4_jpeg.sv"
}
],
"review_source": "rtl/ip/multimedia/apb4_jpeg.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06."
},
"main.RESULT_FORMAT": {
"access": "RO",
"fields": [
{
"lsb": 0,
"msb": 2,
"name": "FORMAT",
"description": "0: Gray8; 1: RGB565; 2: RGB888; 3: YUYV422; 4: NV12. Other encodings are unsupported.",
"reset": "Register reset applies",
"expression": "rtl/ip/multimedia/apb4_jpeg.sv"
},
{
"lsb": 3,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/multimedia/apb4_jpeg.sv"
}
],
"review_source": "rtl/ip/multimedia/apb4_jpeg.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06."
},
"main.RESULT_MARKERS": {
"access": "RO"
},
"main.RING_BASE": {
"access": "RW"
},
"main.RING_SIZE": {
"access": "RW"
},
"main.RING_TAIL": {
"access": "RW"
},
"main.RING_CONTROL": {
"access": "RW"
},
"main.IRQ_COALESCE": {
"access": "RW"
},
"main.TABLE_CONTEXT": {
"access": "RW"
},
"main.TABLE_KIND": {
"access": "RW"
},
"main.TABLE_INDEX": {
"access": "RW"
},
"main.TABLE_DATA": {
"access": "RW"
}
},
"apu": {
"main.KWS_INPUT_CONFIG": {
"access": "RW",
"description": "Capture rate, physical channel count, and sample precision for continuous KWS input.",
"notes": "Default PRODUCT has EnableP7=0; both reads and writes of this offset return an APB error. The stored reset value does not establish an enabled KWS input path."
},
"main.COMMAND": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "START_DIRECT",
"description": "Start direct.",
"reset": "Register reset applies",
"expression": "`APB4_APU__COMMAND_START_DIRECT"
},
{
"lsb": 1,
"msb": 1,
"name": "ABORT",
"description": "Abort.",
"reset": "Register reset applies",
"expression": "`APB4_APU__COMMAND_ABORT"
},
{
"lsb": 2,
"msb": 2,
"name": "SOFT_RESET",
"description": "Soft reset.",
"reset": "Register reset applies",
"expression": "`APB4_APU__COMMAND_SOFT_RESET"
},
{
"lsb": 3,
"msb": 3,
"name": "RING_KICK",
"description": "Ring kick.",
"reset": "Register reset applies",
"expression": "`APB4_APU__COMMAND_RING_KICK"
},
{
"lsb": 4,
"msb": 4,
"name": "MICROCODE_LOAD",
"description": "Microcode load.",
"reset": "Register reset applies",
"expression": "`APB4_APU__COMMAND_MICROCODE_LOAD"
},
{
"lsb": 5,
"msb": 5,
"name": "MODEL_LOAD",
"description": "Model load.",
"reset": "Register reset applies",
"expression": "`APB4_APU__COMMAND_MODEL_LOAD"
},
{
"lsb": 6,
"msb": 6,
"name": "CLEAR_COUNTERS",
"description": "Clear counters.",
"reset": "Register reset applies",
"expression": "`APB4_APU__COMMAND_CLEAR_COUNTERS"
},
{
"lsb": 7,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
},
"main.IRQ_TEST": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "DIRECT_DONE",
"description": "Direct done.",
"reset": "Register reset applies",
"expression": "`APB4_APU__IRQ_DIRECT_DONE"
},
{
"lsb": 1,
"msb": 1,
"name": "RING_EVENT",
"description": "Ring event.",
"reset": "Register reset applies",
"expression": "`APB4_APU__IRQ_RING_EVENT"
},
{
"lsb": 2,
"msb": 2,
"name": "KWS_HIT",
"description": "Kws hit.",
"reset": "Register reset applies",
"expression": "`APB4_APU__IRQ_KWS_HIT"
},
{
"lsb": 3,
"msb": 3,
"name": "MICROCODE_LOAD_DONE",
"description": "Microcode load done.",
"reset": "Register reset applies",
"expression": "`APB4_APU__IRQ_MICROCODE_LOAD_DONE"
},
{
"lsb": 4,
"msb": 4,
"name": "MODEL_LOAD_DONE",
"description": "Model load done.",
"reset": "Register reset applies",
"expression": "`APB4_APU__IRQ_MODEL_LOAD_DONE"
},
{
"lsb": 5,
"msb": 5,
"name": "ABORT_DONE",
"description": "Abort done.",
"reset": "Register reset applies",
"expression": "`APB4_APU__IRQ_ABORT_DONE"
},
{
"lsb": 6,
"msb": 6,
"name": "INPUT_WATERMARK",
"description": "Input watermark.",
"reset": "Register reset applies",
"expression": "`APB4_APU__IRQ_INPUT_WATERMARK"
},
{
"lsb": 7,
"msb": 7,
"name": "OUTPUT_WATERMARK",
"description": "Output watermark.",
"reset": "Register reset applies",
"expression": "`APB4_APU__IRQ_OUTPUT_WATERMARK"
},
{
"lsb": 8,
"msb": 8,
"name": "FIRST_ERROR",
"description": "First error.",
"reset": "Register reset applies",
"expression": "`APB4_APU__IRQ_FIRST_ERROR"
},
{
"lsb": 9,
"msb": 9,
"name": "STREAM_XRUN",
"description": "Stream xrun.",
"reset": "Register reset applies",
"expression": "`APB4_APU__IRQ_STREAM_XRUN"
},
{
"lsb": 10,
"msb": 10,
"name": "SEQUENCER_TRAP",
"description": "Sequencer trap.",
"reset": "Register reset applies",
"expression": "`APB4_APU__IRQ_SEQUENCER_TRAP"
},
{
"lsb": 11,
"msb": 11,
"name": "COEFFICIENT_LOAD_DONE",
"description": "Coefficient load reached a terminal success or error state.",
"reset": "Register reset applies",
"expression": "`APB4_APU__IRQ_COEFFICIENT_LOAD_DONE"
},
{
"lsb": 12,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
},
"main.IP_VERSION": {
"description": "P9 uses additive APB interface V1.2 (0x00010002), preserving the frozen V1.0/V1.1 offsets and accepted fields while adding coefficient discovery and loading."
},
"main.CAPABILITY1": {
"description": "Expanded P5 geometry is 0x01827020: 32 KiB control store, 112 KiB local data, two channels, and 96 kHz maximum source-rate encoding."
},
"main.JOB_INPUT_CONFIG": {
"fields": [
{
"name": "RATE_HZ",
"lsb": 0,
"msb": 16,
"description": "Expected source sample rate; zero derives it from the stream.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "CHANNELS",
"lsb": 17,
"msb": 18,
"description": "Expected source channel count; zero derives it.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 19,
"msb": 19,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
},
{
"name": "SAMPLE_BITS",
"lsb": 20,
"msb": 25,
"description": "Expected source bits per sample; zero derives it.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 26,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"reset": "0"
},
"main.JOB_OUTPUT_CONFIG": {
"fields": [
{
"name": "RATE_HZ",
"lsb": 0,
"msb": 16,
"description": "Requested output sample rate.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "CHANNELS",
"lsb": 17,
"msb": 18,
"description": "Requested output channel count.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "PCM_FORMAT",
"lsb": 19,
"msb": 20,
"description": "Output PCM format selector defined by the APU data contract.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 21,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"reset": "0"
},
"main.ERROR_STATUS": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "VALID",
"description": "Sticky first error. Write one to clear the latched status.",
"reset": "Register reset applies",
"expression": "rtl/ip/multimedia/apu_define.svh"
},
{
"lsb": 1,
"msb": 6,
"name": "CODE",
"description": "0: none; 1: configuration; 2: ring; 3: unsupported; 4: malformed; 5: truncated; 6: codec CRC; 7: decode; 8: reconstruction; 9: microcode; 10: microcode CRC; 11: sequencer; 12: KWS model; 13: KWS CRC; 14: KWS arithmetic; 15: AXI read; 16: AXI write; 17: DMA timeout; 18: stream underrun; 19: stream overrun; 20: abort; 21: resource reset; 22: overflow. Codes for unavailable capabilities remain ABI definitions.",
"reset": "Register reset applies",
"expression": "rtl/ip/multimedia/apu_define.svh"
},
{
"lsb": 7,
"msb": 10,
"name": "STAGE",
"description": "0: APB; 1: loader; 2: ring; 3: read DMA; 4: bitstream; 5: entropy; 6: reconstruction; 7: resampler; 8: write DMA; 9: KWS frontend; 10: KWS inference; 11: lifecycle.",
"reset": "Register reset applies",
"expression": "rtl/ip/multimedia/apu_define.svh"
},
{
"lsb": 11,
"msb": 12,
"name": "AXI_RESPONSE",
"description": "Captured AXI response: 0 OKAY, 1 EXOKAY, 2 SLVERR, 3 DECERR.",
"reset": "Register reset applies",
"expression": "rtl/ip/multimedia/apu_define.svh"
},
{
"lsb": 13,
"msb": 20,
"name": "DESCRIPTOR_INDEX",
"description": "Ring descriptor index associated with the first error.",
"reset": "Register reset applies",
"expression": "rtl/ip/multimedia/apu_define.svh"
},
{
"lsb": 21,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/multimedia/apu_define.svh"
}
],
"review_source": "rtl/ip/multimedia/apu_define.svh",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06.",
"reset": "0"
}
},
"npu": {
"main.IP_ID": {
"access": "RO",
"reset": "0x4E505531",
"description": "Fixed NPU identifier.",
"fields": [
{
"name": "IDENTIFIER",
"lsb": 0,
"msb": 31,
"description": "Fixed value 0x4E505531 (NPU1).",
"reset": "0x4E505531",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.IP_VERSION": {
"access": "RO",
"reset": "0x00010000",
"description": "NPU register ABI version.",
"fields": [
{
"name": "MINOR",
"lsb": 0,
"msb": 15,
"description": "Register ABI minor version.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
},
{
"name": "MAJOR",
"lsb": 16,
"msb": 31,
"description": "Register ABI major version; the current major is 1.",
"reset": "1",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.CAPABILITY": {
"access": "RO",
"reset": "0x0000007F",
"description": "Configured capability bitmap for the implemented operator pipeline, private AXI64 DMA, interrupts, double-rounded numerics, HP-native execution and software abort. Capability bits do not certify a workload or physical result.",
"fields": [
{
"name": "PRESENT",
"lsb": 0,
"msb": 0,
"description": "NPU register and control integration is present.",
"reset": "1",
"expression": "reviewed register ABI 1.0"
},
{
"name": "EXECUTION_READY",
"lsb": 1,
"msb": 1,
"description": "The supported eight-operator implementation is compiled in and enabled. Execution readiness is separate from corpus or physical qualification.",
"reset": "1",
"expression": "reviewed register ABI 1.0"
},
{
"name": "PRIVATE_AXI64_DMA",
"lsb": 2,
"msb": 2,
"description": "The private AXI64 DMA engine is implemented.",
"reset": "1",
"expression": "reviewed register ABI 1.0"
},
{
"name": "INTERRUPTS",
"lsb": 3,
"msb": 3,
"description": "DONE, ERROR and ABORTED interrupt events are implemented.",
"reset": "1",
"expression": "reviewed register ABI 1.0"
},
{
"name": "DOUBLE_ROUNDING",
"lsb": 4,
"msb": 4,
"description": "The implemented requantizer uses double-rounded integer numerics.",
"reset": "1",
"expression": "reviewed register ABI 1.0"
},
{
"name": "NATIVE_HP_CLOCK",
"lsb": 5,
"msb": 5,
"description": "HP-native clock execution; compute runs on the HP fabric clock.",
"reset": "1",
"expression": "reviewed register ABI 1.0"
},
{
"name": "SOFTWARE_ABORT",
"lsb": 6,
"msb": 6,
"description": "An active job accepts software abort and drains accepted work.",
"reset": "1",
"expression": "reviewed register ABI 1.0"
},
{
"name": "Reserved",
"lsb": 7,
"msb": 31,
"description": "Reserved; reads zero.",
"reset": "0",
"expression": "reserved"
}
]
},
"main.STATUS": {
"access": "RO",
"reset": "Dynamic",
"description": "Live shell/link, lifecycle, and terminal status.",
"fields": [
{
"name": "READY",
"lsb": 0,
"msb": 0,
"description": "Shell can accept a job: link reconciled, executable implementation present, and no request, busy launch, pending terminal IRQ, or snapshot handshake.",
"reset": "Dynamic",
"expression": "reviewed register ABI 1.0"
},
{
"name": "BUSY",
"lsb": 1,
"msb": 1,
"description": "Accepted launch slot or HP job activity.",
"reset": "Dynamic",
"expression": "reviewed register ABI 1.0"
},
{
"name": "DRAINING",
"lsb": 2,
"msb": 2,
"description": "HP side is draining accepted work.",
"reset": "Dynamic",
"expression": "reviewed register ABI 1.0"
},
{
"name": "CLOCK_PAUSED",
"lsb": 3,
"msb": 3,
"description": "HP clock pause is active.",
"reset": "Dynamic",
"expression": "reviewed register ABI 1.0"
},
{
"name": "RECOVERING",
"lsb": 4,
"msb": 4,
"description": "Link/transport recovery is in progress.",
"reset": "Dynamic",
"expression": "reviewed register ABI 1.0"
},
{
"name": "RESULT_VALID",
"lsb": 5,
"msb": 5,
"description": "A terminal result is held.",
"reset": "Dynamic",
"expression": "reviewed register ABI 1.0"
},
{
"name": "Reserved",
"lsb": 6,
"msb": 31,
"description": "Reserved; reads zero.",
"reset": "0",
"expression": "reserved"
}
]
},
"main.CONTROL": {
"access": "WO",
"reset": "Not retained",
"description": "Issue exactly one implemented command bit per write.",
"fields": [
{
"name": "START",
"lsb": 0,
"msb": 0,
"description": "Launch the staged job; PSLVERR while READY is low.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
},
{
"name": "ABORT",
"lsb": 1,
"msb": 1,
"description": "Cancel the active job; a successful no-op while idle.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
},
{
"name": "SOFT_RESET",
"lsb": 2,
"msb": 2,
"description": "Clear programmable, IRQ, and result state, then reconcile the link.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
},
{
"name": "Reserved",
"lsb": 3,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0",
"expression": "reserved"
}
]
},
"main.IRQ_STATE": {
"access": "RW1C",
"reset": "0x00000000",
"description": "Sticky IRQ events; hardware/test set wins a same-cycle clear.",
"fields": [
{
"name": "DONE",
"lsb": 0,
"msb": 0,
"description": "Job completion event.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
},
{
"name": "ERROR",
"lsb": 1,
"msb": 1,
"description": "First fault/error event.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
},
{
"name": "ABORTED",
"lsb": 2,
"msb": 2,
"description": "Abort completion event.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
},
{
"name": "Reserved",
"lsb": 3,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0",
"expression": "reserved"
}
]
},
"main.IRQ_ENABLE": {
"access": "RW",
"reset": "0x00000000",
"description": "IRQ event enables.",
"fields": [
{
"name": "DONE",
"lsb": 0,
"msb": 0,
"description": "Enable the completion interrupt.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
},
{
"name": "ERROR",
"lsb": 1,
"msb": 1,
"description": "Enable the error interrupt.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
},
{
"name": "ABORTED",
"lsb": 2,
"msb": 2,
"description": "Enable the abort interrupt.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
},
{
"name": "Reserved",
"lsb": 3,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0",
"expression": "reserved"
}
]
},
"main.IRQ_TEST": {
"access": "WO",
"reset": "Not retained",
"description": "Inject implemented IRQ events as if hardware-set.",
"fields": [
{
"name": "DONE",
"lsb": 0,
"msb": 0,
"description": "Inject the completion event.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
},
{
"name": "ERROR",
"lsb": 1,
"msb": 1,
"description": "Inject the error event.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
},
{
"name": "ABORTED",
"lsb": 2,
"msb": 2,
"description": "Inject the abort event.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
},
{
"name": "Reserved",
"lsb": 3,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0",
"expression": "reserved"
}
]
},
"main.JOB_BASE": {
"access": "RW idle",
"reset": "0x00000000",
"description": "Physical descriptor base address; writable only while the shell is idle.",
"fields": [
{
"name": "ADDR",
"lsb": 0,
"msb": 31,
"description": "Physical byte address of the descriptor ring.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.JOB_COUNT": {
"access": "RW idle",
"reset": "0x00000000",
"description": "Descriptor count for the staged job.",
"fields": [
{
"name": "COUNT",
"lsb": 0,
"msb": 15,
"description": "Number of descriptors.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
},
{
"name": "Reserved",
"lsb": 16,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0",
"expression": "reserved"
}
]
},
"main.JOB_ID": {
"access": "RW idle",
"reset": "0x00000000",
"description": "Opaque software job token mirrored into the result.",
"fields": [
{
"name": "TOKEN",
"lsb": 0,
"msb": 31,
"description": "Opaque software token.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.TIMEOUT_CYCLES": {
"access": "RW idle",
"reset": "0x00000000",
"description": "HP active cycles without progress before a no-progress fault; a zero write is rejected.",
"fields": [
{
"name": "CYCLES",
"lsb": 0,
"msb": 31,
"description": "No-progress timeout budget.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.RESULT_JOB_ID": {
"access": "RO",
"reset": "Dynamic",
"description": "Job token of the last terminal or recovery result.",
"fields": [
{
"name": "TOKEN",
"lsb": 0,
"msb": 31,
"description": "Terminal or recovery job token.",
"reset": "Dynamic",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.RESULT_CODE": {
"access": "RO",
"reset": "Dynamic",
"description": "Terminal result enumeration: NONE=0, DONE=1, ERROR=2, ABORTED=3, RESET_CANCELLED=4.",
"fields": [
{
"name": "CODE",
"lsb": 0,
"msb": 2,
"description": "Terminal result code.",
"reset": "Dynamic",
"expression": "reviewed register ABI 1.0"
},
{
"name": "Reserved",
"lsb": 3,
"msb": 31,
"description": "Reserved; reads zero.",
"reset": "0",
"expression": "reserved"
}
]
},
"main.COMPLETED_DESCRIPTORS": {
"access": "RO",
"reset": "Dynamic",
"description": "Fully stored descriptor count of the last job.",
"fields": [
{
"name": "COUNT",
"lsb": 0,
"msb": 31,
"description": "Complete stores only.",
"reset": "Dynamic",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.FAULT_DESCRIPTOR": {
"access": "RO",
"reset": "Dynamic",
"description": "Zero-based index of the first faulting descriptor, or all ones for a job-level fault.",
"fields": [
{
"name": "INDEX",
"lsb": 0,
"msb": 31,
"description": "Faulting descriptor index; 0xFFFFFFFF marks a job-level fault.",
"reset": "Dynamic",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.FAULT_CODE": {
"access": "RO",
"reset": "Dynamic",
"description": "First fault/error code.",
"fields": [
{
"name": "CODE",
"lsb": 0,
"msb": 3,
"description": "Fault enumeration.",
"reset": "Dynamic",
"expression": "reviewed register ABI 1.0"
},
{
"name": "Reserved",
"lsb": 4,
"msb": 31,
"description": "Reserved; reads zero.",
"reset": "0",
"expression": "reserved"
}
]
},
"main.FAULT_ADDRESS": {
"access": "RO",
"reset": "Dynamic",
"description": "First relevant external byte address, otherwise 0.",
"fields": [
{
"name": "ADDR",
"lsb": 0,
"msb": 31,
"description": "Fault byte address.",
"reset": "Dynamic",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.FAULT_INFO": {
"access": "RO",
"reset": "Dynamic",
"description": "Fault direction, AXI response, and lane detail.",
"fields": [
{
"name": "AXI_RESPONSE",
"lsb": 0,
"msb": 1,
"description": "AXI response code of the faulting beat.",
"reset": "Dynamic",
"expression": "reviewed register ABI 1.0"
},
{
"name": "DIRECTION",
"lsb": 2,
"msb": 3,
"description": "Fault direction: internal, read, or write.",
"reset": "Dynamic",
"expression": "reviewed register ABI 1.0"
},
{
"name": "Reserved",
"lsb": 4,
"msb": 7,
"description": "Reserved; reads zero.",
"reset": "0",
"expression": "reserved"
},
{
"name": "LANE",
"lsb": 8,
"msb": 15,
"description": "Faulting lane, or 0xFF when not lane-specific.",
"reset": "Dynamic",
"expression": "reviewed register ABI 1.0"
},
{
"name": "Reserved",
"lsb": 16,
"msb": 31,
"description": "Reserved; reads zero.",
"reset": "0",
"expression": "reserved"
}
]
},
"main.NUMERIC_PROFILE": {
"access": "RO",
"reset": "0x00000001",
"description": "Numeric profile identifier.",
"fields": [
{
"name": "PROFILE",
"lsb": 0,
"msb": 31,
"description": "Fixed value 1: the numeric profile of this specification.",
"reset": "1",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.LOCAL_BYTES": {
"access": "RO",
"reset": "0x00010000",
"description": "Instantiated local SRAM bytes: 64 KiB of banked private SRAM (sixteen 1024x32 banks).",
"fields": [
{
"name": "BYTES",
"lsb": 0,
"msb": 31,
"description": "Instantiated local bytes.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.MAC_CONFIG": {
"access": "RO",
"reset": "0x00080040",
"description": "Instantiated MAC lane configuration: 64 dense lanes in bits 15:0, 8 depthwise lanes in bits 31:16.",
"fields": [
{
"name": "DENSE",
"lsb": 0,
"msb": 15,
"description": "Dense lane count when implemented.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
},
{
"name": "DEPTHWISE",
"lsb": 16,
"msb": 31,
"description": "Depthwise lane count when implemented.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.MAX_K_SLICE": {
"access": "RO",
"reset": "0x00000400",
"description": "Maximum supported K slice: 1024.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "K-slice limit.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.MAX_DIMENSION": {
"access": "RO",
"reset": "0x00001000",
"description": "Maximum supported tensor dimension: 4096.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "Dimension limit.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.OP_CAPABILITY": {
"access": "RO",
"reset": "0x000001FE",
"description": "Implemented operator mask: bit n advertises opcode n; the configured mask 0x000001FE enables opcodes 1 through 8.",
"fields": [
{
"name": "Reserved",
"lsb": 0,
"msb": 0,
"description": "Reserved; reads zero.",
"reset": "0",
"expression": "reserved"
},
{
"name": "CONV2D",
"lsb": 1,
"msb": 1,
"description": "2D convolution operator.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
},
{
"name": "DEPTHWISE3X3",
"lsb": 2,
"msb": 2,
"description": "3x3 depthwise operator.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
},
{
"name": "FULLY_CONNECTED",
"lsb": 3,
"msb": 3,
"description": "Fully connected operator.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
},
{
"name": "ADD",
"lsb": 4,
"msb": 4,
"description": "Tensor add operator.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
},
{
"name": "MAX_POOL",
"lsb": 5,
"msb": 5,
"description": "Max pooling operator.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
},
{
"name": "AVERAGE_POOL",
"lsb": 6,
"msb": 6,
"description": "Average pooling operator.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
},
{
"name": "GLOBAL_AVERAGE_POOL",
"lsb": 7,
"msb": 7,
"description": "Global average pooling operator.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
},
{
"name": "CLAMP",
"lsb": 8,
"msb": 8,
"description": "Clamp operator.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
},
{
"name": "Reserved",
"lsb": 9,
"msb": 31,
"description": "Reserved; reads zero.",
"reset": "0",
"expression": "reserved"
}
]
},
"main.OWNER_STATUS": {
"access": "RO",
"reset": "Dynamic",
"description": "Live resource ownership view.",
"fields": [
{
"name": "OWNER",
"lsb": 0,
"msb": 1,
"description": "Current owner: 0 LP, 1 HP.",
"reset": "Dynamic",
"expression": "reviewed register ABI 1.0"
},
{
"name": "Reserved",
"lsb": 2,
"msb": 7,
"description": "Reserved; reads zero.",
"reset": "0",
"expression": "reserved"
},
{
"name": "LOCK",
"lsb": 8,
"msb": 8,
"description": "Sticky owner lock.",
"reset": "Dynamic",
"expression": "reviewed register ABI 1.0"
},
{
"name": "QUIESCE",
"lsb": 9,
"msb": 9,
"description": "Quiesce request in effect.",
"reset": "Dynamic",
"expression": "reviewed register ABI 1.0"
},
{
"name": "RESET_REQUEST",
"lsb": 10,
"msb": 10,
"description": "Reset request in effect.",
"reset": "Dynamic",
"expression": "reviewed register ABI 1.0"
},
{
"name": "Reserved",
"lsb": 11,
"msb": 31,
"description": "Reserved; reads zero.",
"reset": "0",
"expression": "reserved"
}
]
},
"main.RECOVERY_GENERATION": {
"access": "RO",
"reset": "Dynamic",
"description": "PCLK-visible epoch recovery generation; increments after each completed link/transport recovery.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "Wrapping recovery generation counter.",
"reset": "Dynamic",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.PERF_CONTROL": {
"access": "WO",
"reset": "Not retained",
"description": "Performance snapshot command.",
"fields": [
{
"name": "SNAPSHOT",
"lsb": 0,
"msb": 0,
"description": "Capture the counter bank and job token atomically.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
},
{
"name": "Reserved",
"lsb": 1,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0",
"expression": "reserved"
}
]
},
"main.PERF_STATUS": {
"access": "RO",
"reset": "Dynamic",
"description": "Snapshot handshake status.",
"fields": [
{
"name": "SNAP_BUSY",
"lsb": 0,
"msb": 0,
"description": "A snapshot request is in flight.",
"reset": "Dynamic",
"expression": "reviewed register ABI 1.0"
},
{
"name": "SNAP_VALID",
"lsb": 1,
"msb": 1,
"description": "A captured counter bank is held.",
"reset": "Dynamic",
"expression": "reviewed register ABI 1.0"
},
{
"name": "Reserved",
"lsb": 2,
"msb": 31,
"description": "Reserved; reads zero.",
"reset": "0",
"expression": "reserved"
}
]
},
"main.PERF_JOB_ID": {
"access": "RO",
"reset": "Dynamic",
"description": "Job token associated with the captured snapshot.",
"fields": [
{
"name": "TOKEN",
"lsb": 0,
"msb": 31,
"description": "Snapshot job token.",
"reset": "Dynamic",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.PERF_GENERATION": {
"access": "RO",
"reset": "Dynamic",
"description": "Recovery generation associated with the captured snapshot.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "Snapshot recovery generation.",
"reset": "Dynamic",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.DESCRIPTOR_BYTES": {
"access": "RO",
"reset": "0x00000080",
"description": "Descriptor record size in bytes.",
"fields": [
{
"name": "BYTES",
"lsb": 0,
"msb": 31,
"description": "Fixed value 128.",
"reset": "0x80",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.PERF_ACTIVE_CYCLES_LO": {
"access": "RO",
"reset": "0x00000000",
"description": "Low 32 bits of the HP active cycles counter; read from the captured performance snapshot.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "Low snapshot word.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.PERF_ACTIVE_CYCLES_HI": {
"access": "RO",
"reset": "0x00000000",
"description": "High 32 bits of the HP active cycles counter; read from the captured performance snapshot.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "High snapshot word.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.PERF_CLOCK_PAUSE_CYCLES_LO": {
"access": "RO",
"reset": "0x00000000",
"description": "Low 32 bits of the HP clock-pause cycles counter; read from the captured performance snapshot.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "Low snapshot word.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.PERF_CLOCK_PAUSE_CYCLES_HI": {
"access": "RO",
"reset": "0x00000000",
"description": "High 32 bits of the HP clock-pause cycles counter; read from the captured performance snapshot.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "High snapshot word.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.PERF_USEFUL_MACS_LO": {
"access": "RO",
"reset": "0x00000000",
"description": "Low 32 bits of the useful MAC operations counter; read from the captured performance snapshot.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "Low snapshot word.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.PERF_USEFUL_MACS_HI": {
"access": "RO",
"reset": "0x00000000",
"description": "High 32 bits of the useful MAC operations counter; read from the captured performance snapshot.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "High snapshot word.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.PERF_PACK_CYCLES_LO": {
"access": "RO",
"reset": "0x00000000",
"description": "Low 32 bits of the patch-packer cycles counter; read from the captured performance snapshot.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "Low snapshot word.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.PERF_PACK_CYCLES_HI": {
"access": "RO",
"reset": "0x00000000",
"description": "High 32 bits of the patch-packer cycles counter; read from the captured performance snapshot.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "High snapshot word.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.PERF_LOCAL_BANK_STALL_LO": {
"access": "RO",
"reset": "0x00000000",
"description": "Low 32 bits of the local bank stall cycles counter; read from the captured performance snapshot.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "Low snapshot word.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.PERF_LOCAL_BANK_STALL_HI": {
"access": "RO",
"reset": "0x00000000",
"description": "High 32 bits of the local bank stall cycles counter; read from the captured performance snapshot.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "High snapshot word.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.PERF_DMA_READ_BYTES_LO": {
"access": "RO",
"reset": "0x00000000",
"description": "Low 32 bits of the DMA read bytes counter; read from the captured performance snapshot.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "Low snapshot word.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.PERF_DMA_READ_BYTES_HI": {
"access": "RO",
"reset": "0x00000000",
"description": "High 32 bits of the DMA read bytes counter; read from the captured performance snapshot.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "High snapshot word.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.PERF_DMA_WRITE_BYTES_LO": {
"access": "RO",
"reset": "0x00000000",
"description": "Low 32 bits of the DMA write bytes counter; read from the captured performance snapshot.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "Low snapshot word.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.PERF_DMA_WRITE_BYTES_HI": {
"access": "RO",
"reset": "0x00000000",
"description": "High 32 bits of the DMA write bytes counter; read from the captured performance snapshot.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "High snapshot word.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.PERF_DMA_STALL_CYCLES_LO": {
"access": "RO",
"reset": "0x00000000",
"description": "Low 32 bits of the DMA stall cycles counter; read from the captured performance snapshot.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "Low snapshot word.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.PERF_DMA_STALL_CYCLES_HI": {
"access": "RO",
"reset": "0x00000000",
"description": "High 32 bits of the DMA stall cycles counter; read from the captured performance snapshot.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "High snapshot word.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.PERF_REQUANT_STALL_LO": {
"access": "RO",
"reset": "0x00000000",
"description": "Low 32 bits of the requantizer stall cycles counter; read from the captured performance snapshot.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "Low snapshot word.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.PERF_REQUANT_STALL_HI": {
"access": "RO",
"reset": "0x00000000",
"description": "High 32 bits of the requantizer stall cycles counter; read from the captured performance snapshot.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "High snapshot word.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.PERF_RETIRED_DESCRIPTORS_LO": {
"access": "RO",
"reset": "0x00000000",
"description": "Low 32 bits of the retired descriptors counter; read from the captured performance snapshot.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "Low snapshot word.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
}
]
},
"main.PERF_RETIRED_DESCRIPTORS_HI": {
"access": "RO",
"reset": "0x00000000",
"description": "High 32 bits of the retired descriptors counter; read from the captured performance snapshot.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "High snapshot word.",
"reset": "0",
"expression": "reviewed register ABI 1.0"
}
]
}
},
"ga2d": {
"main.IP_ID": {
"access": "RO",
"reset": "0x47413244",
"description": "Fixed GA2D identifier.",
"fields": [
{
"name": "IDENTIFIER",
"lsb": 0,
"msb": 31,
"description": "Fixed value 0x47413244 (GA2D).",
"reset": "0x47413244",
"expression": "reviewed P5 ABI"
}
]
},
"main.IP_VERSION": {
"access": "RO",
"reset": "0x00010000",
"description": "GA2D register ABI version.",
"fields": [
{
"name": "MINOR",
"lsb": 0,
"msb": 15,
"description": "ABI minor version.",
"reset": "0",
"expression": "reviewed P5 ABI"
},
{
"name": "MAJOR",
"lsb": 16,
"msb": 31,
"description": "ABI major version; P5 retains major 1.",
"reset": "1",
"expression": "reviewed P5 ABI"
}
]
},
"main.CAPABILITY": {
"access": "RO",
"reset": "0x000007FF",
"description": "P5 capability bitmap; FILL, COPY, CONVERT, BLEND, A8 fixed-color foreground masks, private DMA, IRQ, snapshots, two-dimensional pitch, byte edges, and exact equal background/destination in-place composition are advertised.",
"fields": [
{
"name": "FILL",
"lsb": 0,
"msb": 0,
"description": "Fill operation capability; set in P5.",
"reset": "1",
"expression": "reviewed P5 ABI"
},
{
"name": "COPY",
"lsb": 1,
"msb": 1,
"description": "Copy operation capability; set in P5.",
"reset": "1",
"expression": "reviewed P5 ABI"
},
{
"name": "CONVERT",
"lsb": 2,
"msb": 2,
"description": "Bit-exact conversion operation capability; set in P5.",
"reset": "1",
"expression": "reviewed P5 ABI"
},
{
"name": "BLEND",
"lsb": 3,
"msb": 3,
"description": "Opaque alpha blend operation capability; set in P5.",
"reset": "1",
"expression": "reviewed P5 ABI"
},
{
"name": "A8_MASK",
"lsb": 4,
"msb": 4,
"description": "A8 fixed-color foreground-mask capability for BLEND only; set in P5.",
"reset": "1",
"expression": "reviewed P5 ABI"
},
{
"name": "PRIVATE_DMA",
"lsb": 5,
"msb": 5,
"description": "Private AXI64 DMA capability; set in P5.",
"reset": "1",
"expression": "reviewed P5 ABI"
},
{
"name": "IRQ",
"lsb": 6,
"msb": 6,
"description": "Direct-engine IRQ capability.",
"reset": "1",
"expression": "reviewed P5 ABI"
},
{
"name": "SNAPSHOT",
"lsb": 7,
"msb": 7,
"description": "Performance snapshot capability; set in P5.",
"reset": "1",
"expression": "reviewed P5 ABI"
},
{
"name": "TWO_DIMENSIONAL_PITCH",
"lsb": 8,
"msb": 8,
"description": "Two-dimensional pitch capability; set in P5.",
"reset": "1",
"expression": "reviewed P5 ABI"
},
{
"name": "BYTE_EDGES",
"lsb": 9,
"msb": 9,
"description": "Byte-edge DMA capability; set in P5.",
"reset": "1",
"expression": "reviewed P5 ABI"
},
{
"name": "INPLACE_BACKGROUND",
"lsb": 10,
"msb": 10,
"description": "Exact equal background/destination in-place composition capability; set in P5.",
"reset": "1",
"expression": "reviewed P5 ABI"
},
{
"name": "Reserved",
"lsb": 11,
"msb": 31,
"description": "Reserved; reads zero.",
"reset": "0",
"expression": "reserved"
}
]
},
"main.LIMITS": {
"access": "RO",
"reset": "0x08202010",
"description": "P5 private-AXI64 DMA geometry limits.",
"fields": [
{
"name": "MAX_BURST_BEATS",
"lsb": 0,
"msb": 7,
"description": "Maximum DMA burst beats; 16 in P5.",
"reset": "16",
"expression": "reviewed P5 ABI"
},
{
"name": "INPUT_FIFO_DEPTH",
"lsb": 8,
"msb": 15,
"description": "Input FIFO depth; 32 beats in P5.",
"reset": "32",
"expression": "reviewed P5 ABI"
},
{
"name": "OUTPUT_FIFO_DEPTH",
"lsb": 16,
"msb": 23,
"description": "Output FIFO depth; 32 beats in P5.",
"reset": "32",
"expression": "reviewed P5 ABI"
},
{
"name": "AXI_BEAT_BYTES",
"lsb": 24,
"msb": 31,
"description": "AXI DMA beat width; 8 bytes in P5.",
"reset": "8",
"expression": "reviewed P5 ABI"
}
]
},
"main.COMMAND": {
"access": "WO",
"reset": "Not retained",
"description": "Single-command write port for P5 direct jobs.",
"fields": [
{
"name": "START",
"lsb": 0,
"msb": 0,
"description": "Start an idle, recovered P5 direct FILL, COPY, CONVERT, or BLEND job.",
"reset": "Not retained",
"expression": "reviewed P5 ABI"
},
{
"name": "ABORT",
"lsb": 1,
"msb": 1,
"description": "Request a safe abort; an idle engine is a no-op.",
"reset": "Not retained",
"expression": "reviewed P5 ABI"
},
{
"name": "SOFT_RESET",
"lsb": 2,
"msb": 2,
"description": "Clear local shell state only when safe idle and recovered.",
"reset": "Not retained",
"expression": "reviewed P5 ABI"
},
{
"name": "Reserved",
"lsb": 3,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "reserved"
}
]
},
"main.STATUS": {
"access": "RO",
"reset": "Dynamic",
"description": "Live P5 engine, lifecycle, and recovery status.",
"fields": [
{
"name": "BUSY",
"lsb": 0,
"msb": 0,
"description": "Live job-active status.",
"reset": "Dynamic",
"expression": "reviewed P5 ABI"
},
{
"name": "DRAINING",
"lsb": 1,
"msb": 1,
"description": "Live drain status while abort, error, or resource stop retires accepted traffic.",
"reset": "Dynamic",
"expression": "reviewed P5 ABI"
},
{
"name": "QUIESCED",
"lsb": 2,
"msb": 2,
"description": "Resource stop has reached safe source idle and block acknowledgement.",
"reset": "Dynamic",
"expression": "reviewed P5 ABI"
},
{
"name": "DATA_READY",
"lsb": 3,
"msb": 3,
"description": "Qualified bridge data readiness.",
"reset": "Dynamic",
"expression": "reviewed P5 ABI"
},
{
"name": "DONE",
"lsb": 4,
"msb": 4,
"description": "Last direct job completed successfully.",
"reset": "Dynamic",
"expression": "reviewed P5 ABI"
},
{
"name": "ABORTED",
"lsb": 5,
"msb": 5,
"description": "Last direct job reached safe abort completion.",
"reset": "Dynamic",
"expression": "reviewed P5 ABI"
},
{
"name": "ERROR",
"lsb": 6,
"msb": 6,
"description": "Sticky first-error validity.",
"reset": "Dynamic",
"expression": "reviewed P5 ABI"
},
{
"name": "RECOVERY_REQUIRED",
"lsb": 7,
"msb": 7,
"description": "Bridge clear, reset epoch, or data-readiness recovery is unresolved.",
"reset": "Dynamic",
"expression": "reviewed P5 ABI"
},
{
"name": "Reserved",
"lsb": 8,
"msb": 31,
"description": "Reserved; reads zero.",
"reset": "0",
"expression": "reserved"
}
]
},
"main.IRQ_STATE": {
"access": "RW1C",
"reset": "0x00000000",
"description": "Sticky IRQ causes; a same-cycle new event wins over a clear.",
"fields": [
{
"name": "DONE",
"lsb": 0,
"msb": 0,
"description": "Successful terminal job event.",
"reset": "0",
"expression": "reviewed P5 ABI"
},
{
"name": "ERROR",
"lsb": 1,
"msb": 1,
"description": "First-error event.",
"reset": "0",
"expression": "reviewed P5 ABI"
},
{
"name": "ABORT_DONE",
"lsb": 2,
"msb": 2,
"description": "Safe abort completion event.",
"reset": "0",
"expression": "reviewed P5 ABI"
},
{
"name": "Reserved",
"lsb": 3,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0",
"expression": "reserved"
}
]
},
"main.IRQ_ENABLE": {
"access": "RW",
"reset": "0x00000000",
"description": "Interrupt-cause enable mask.",
"fields": [
{
"name": "DONE",
"lsb": 0,
"msb": 0,
"description": "Enable DONE raw IRQ contribution.",
"reset": "0",
"expression": "reviewed P5 ABI"
},
{
"name": "ERROR",
"lsb": 1,
"msb": 1,
"description": "Enable ERROR raw IRQ contribution.",
"reset": "0",
"expression": "reviewed P5 ABI"
},
{
"name": "ABORT_DONE",
"lsb": 2,
"msb": 2,
"description": "Enable ABORT_DONE raw IRQ contribution.",
"reset": "0",
"expression": "reviewed P5 ABI"
},
{
"name": "Reserved",
"lsb": 3,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0",
"expression": "reserved"
}
]
},
"main.IRQ_TEST": {
"access": "WO",
"reset": "Not retained",
"description": "Set selected IRQ_STATE causes for route testing without job progress.",
"fields": [
{
"name": "DONE",
"lsb": 0,
"msb": 0,
"description": "Set DONE state for route testing.",
"reset": "Not retained",
"expression": "reviewed P5 ABI"
},
{
"name": "ERROR",
"lsb": 1,
"msb": 1,
"description": "Set ERROR state for route testing.",
"reset": "Not retained",
"expression": "reviewed P5 ABI"
},
{
"name": "ABORT_DONE",
"lsb": 2,
"msb": 2,
"description": "Set ABORT_DONE state for route testing.",
"reset": "Not retained",
"expression": "reviewed P5 ABI"
},
{
"name": "Reserved",
"lsb": 3,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "reserved"
}
]
},
"main.ERROR_STATUS": {
"access": "RO/W1C",
"reset": "0x00000000",
"description": "Sticky first-error record; write one clears a safe idle record.",
"fields": [
{
"name": "VALID",
"lsb": 0,
"msb": 0,
"description": "First-error record is valid.",
"reset": "0",
"expression": "reviewed P5 ABI"
},
{
"name": "CODE",
"lsb": 1,
"msb": 7,
"description": "First-error code.",
"reset": "0",
"expression": "reviewed P5 ABI"
},
{
"name": "STAGE",
"lsb": 8,
"msb": 11,
"description": "First-error processing stage.",
"reset": "0",
"expression": "reviewed P5 ABI"
},
{
"name": "AXI_RESPONSE",
"lsb": 12,
"msb": 13,
"description": "Captured AXI response for a bus error.",
"reset": "0",
"expression": "reviewed P5 ABI"
},
{
"name": "Reserved",
"lsb": 14,
"msb": 31,
"description": "Reserved; reads zero.",
"reset": "0",
"expression": "reserved"
}
]
},
"main.ERROR_ADDRESS": {
"access": "RO",
"reset": "0x00000000",
"description": "Address associated with the sticky first-error record.",
"fields": [
{
"name": "ADDRESS",
"lsb": 0,
"msb": 31,
"description": "Captured first-error byte address.",
"reset": "0",
"expression": "reviewed P5 ABI"
}
]
},
"main.TIMEOUT_CYCLES": {
"access": "RW idle",
"reset": "0x00100000",
"description": "Idle-only no-progress timeout threshold; zero is rejected.",
"fields": [
{
"name": "CYCLES",
"lsb": 0,
"msb": 31,
"description": "PCLK no-progress timeout budget.",
"reset": "0x00100000",
"expression": "reviewed P5 ABI"
}
]
},
"main.JOB_CONFIG": {
"access": "RW idle",
"reset": "0x00000000",
"description": "Shadow job operation selector for P5 direct jobs.",
"fields": [
{
"name": "OPERATION",
"lsb": 0,
"msb": 1,
"description": "0: FILL; 1: COPY; 2: bit-exact CONVERT; 3: opaque alpha BLEND.",
"reset": "0",
"expression": "reviewed P5 ABI"
},
{
"name": "Reserved",
"lsb": 2,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0",
"expression": "reserved"
}
]
},
"main.GLOBAL_ALPHA": {
"access": "RW idle",
"reset": "0x000000FF",
"description": "Shadow global alpha value used only by P5 BLEND; FILL, COPY, and CONVERT ignore it.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 7,
"description": "Global alpha value used only by BLEND; ignored by FILL, COPY, and CONVERT.",
"reset": "0xFF",
"expression": "reviewed P5 ABI"
},
{
"name": "Reserved",
"lsb": 8,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0",
"expression": "reserved"
}
]
},
"main.COLOR": {
"access": "RW idle",
"reset": "0x00000000",
"description": "Shadow constant color in AARRGGBB order.",
"fields": [
{
"name": "COLOR",
"lsb": 0,
"msb": 31,
"description": "AARRGGBB constant color; FILL uses it directly and A8 BLEND uses its RGB as the fixed foreground color while ignoring its alpha.",
"reset": "0",
"expression": "reviewed P5 ABI"
}
]
},
"main.SIZE": {
"access": "RW idle",
"reset": "0x00000000",
"description": "Shadow job dimensions.",
"fields": [
{
"name": "WIDTH",
"lsb": 0,
"msb": 15,
"description": "Job width in pixels.",
"reset": "0",
"expression": "reviewed P5 ABI"
},
{
"name": "HEIGHT",
"lsb": 16,
"msb": 31,
"description": "Job height in pixels.",
"reset": "0",
"expression": "reviewed P5 ABI"
}
]
},
"main.FG_ADDRESS": {
"access": "RW idle",
"reset": "0x00000000",
"description": "Shadow foreground byte address.",
"fields": [
{
"name": "ADDRESS",
"lsb": 0,
"msb": 31,
"description": "Foreground byte address.",
"reset": "0",
"expression": "reviewed P5 ABI"
}
]
},
"main.FG_PITCH": {
"access": "RW idle",
"reset": "0x00000000",
"description": "Shadow foreground row pitch in bytes.",
"fields": [
{
"name": "PITCH",
"lsb": 0,
"msb": 31,
"description": "Foreground bytes between rows.",
"reset": "0",
"expression": "reviewed P5 ABI"
}
]
},
"main.FG_FORMAT": {
"access": "RW idle",
"reset": "0x00000000",
"description": "Shadow foreground format selector.",
"fields": [
{
"name": "FORMAT",
"lsb": 0,
"msb": 2,
"description": "0: RGB565; 1: RGB888; 2: XRGB8888; 3: ARGB8888 are color formats; 4: A8 is valid only as a BLEND foreground.",
"reset": "0",
"expression": "reviewed P5 ABI"
},
{
"name": "Reserved",
"lsb": 3,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0",
"expression": "reserved"
}
]
},
"main.BG_ADDRESS": {
"access": "RW idle",
"reset": "0x00000000",
"description": "Shadow background byte address used by BLEND; it may equal DST_ADDRESS only with exactly equal pitch and format.",
"fields": [
{
"name": "ADDRESS",
"lsb": 0,
"msb": 31,
"description": "Background byte address for BLEND; exact equality with destination is the only permitted input/output overlap.",
"reset": "0",
"expression": "reviewed P5 ABI"
}
]
},
"main.BG_PITCH": {
"access": "RW idle",
"reset": "0x00000000",
"description": "Shadow background row pitch in bytes used by BLEND.",
"fields": [
{
"name": "PITCH",
"lsb": 0,
"msb": 31,
"description": "Background bytes between rows for BLEND.",
"reset": "0",
"expression": "reviewed P5 ABI"
}
]
},
"main.BG_FORMAT": {
"access": "RW idle",
"reset": "0x00000000",
"description": "Shadow background color-format selector used by BLEND.",
"fields": [
{
"name": "FORMAT",
"lsb": 0,
"msb": 2,
"description": "0: RGB565; 1: RGB888; 2: XRGB8888; 3: ARGB8888 are valid BLEND background color formats; 4: A8 is invalid.",
"reset": "0",
"expression": "reviewed P5 ABI"
},
{
"name": "Reserved",
"lsb": 3,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0",
"expression": "reserved"
}
]
},
"main.DST_ADDRESS": {
"access": "RW idle",
"reset": "0x00000000",
"description": "Shadow destination byte address.",
"fields": [
{
"name": "ADDRESS",
"lsb": 0,
"msb": 31,
"description": "Destination byte address.",
"reset": "0",
"expression": "reviewed P5 ABI"
}
]
},
"main.DST_PITCH": {
"access": "RW idle",
"reset": "0x00000000",
"description": "Shadow destination row pitch in bytes.",
"fields": [
{
"name": "PITCH",
"lsb": 0,
"msb": 31,
"description": "Destination bytes between rows.",
"reset": "0",
"expression": "reviewed P5 ABI"
}
]
},
"main.DST_FORMAT": {
"access": "RW idle",
"reset": "0x00000000",
"description": "Shadow destination format selector.",
"fields": [
{
"name": "FORMAT",
"lsb": 0,
"msb": 2,
"description": "0: RGB565; 1: RGB888; 2: XRGB8888; 3: ARGB8888 are valid destination color formats; 4: A8 is invalid.",
"reset": "0",
"expression": "reviewed P5 ABI"
},
{
"name": "Reserved",
"lsb": 3,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0",
"expression": "reserved"
}
]
},
"main.PERF_SNAPSHOT": {
"access": "WO",
"reset": "Not retained",
"description": "Performance snapshot command for P5 direct-job counters.",
"fields": [
{
"name": "SNAPSHOT",
"lsb": 0,
"msb": 0,
"description": "Capture live P5 direct-job counters into the read bank.",
"reset": "Not retained",
"expression": "reviewed P5 ABI"
},
{
"name": "Reserved",
"lsb": 1,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "reserved"
}
]
},
"main.FORMAT_CAPABILITY": {
"access": "RO",
"reset": "0x000F0F1F",
"description": "P5 format bitmap: foreground RGB565/RGB888/XRGB8888/ARGB8888/A8 bits are set; background and destination RGB565/RGB888/XRGB8888/ARGB8888 bits are set.",
"fields": [
{
"name": "FOREGROUND",
"lsb": 0,
"msb": 4,
"description": "Foreground format capability bits; RGB565/RGB888/XRGB8888/ARGB8888 and A8 are set in P5. A8 is valid only for BLEND.",
"reset": "31",
"expression": "reviewed P5 ABI"
},
{
"name": "Reserved",
"lsb": 5,
"msb": 7,
"description": "Reserved; reads zero.",
"reset": "0",
"expression": "reserved"
},
{
"name": "BACKGROUND",
"lsb": 8,
"msb": 12,
"description": "Background format capability bits; RGB565/RGB888/XRGB8888/ARGB8888 are set in P5. A8 is not a background format.",
"reset": "15",
"expression": "reviewed P5 ABI"
},
{
"name": "Reserved",
"lsb": 13,
"msb": 15,
"description": "Reserved; reads zero.",
"reset": "0",
"expression": "reserved"
},
{
"name": "DESTINATION",
"lsb": 16,
"msb": 20,
"description": "Destination format capability bits; RGB565/RGB888/XRGB8888/ARGB8888 are set in P5. A8 is not a destination format.",
"reset": "15",
"expression": "reviewed P5 ABI"
},
{
"name": "Reserved",
"lsb": 21,
"msb": 31,
"description": "Reserved; reads zero.",
"reset": "0",
"expression": "reserved"
}
]
},
"main.SNAP_CYCLES_LO": {
"access": "RO",
"reset": "0x00000000",
"description": "Low 32 bits of the P5 active-job PCLK cycle snapshot.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "Low cycle-counter snapshot word.",
"reset": "0",
"expression": "reviewed P5 ABI"
}
]
},
"main.SNAP_CYCLES_HI": {
"access": "RO",
"reset": "0x00000000",
"description": "High 32 bits of the P5 active-job PCLK cycle snapshot.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "High cycle-counter snapshot word.",
"reset": "0",
"expression": "reviewed P5 ABI"
}
]
},
"main.SNAP_READ_BYTES_LO": {
"access": "RO",
"reset": "0x00000000",
"description": "Low 32 bits of P5 successful logical input bytes.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "Low read-byte snapshot word.",
"reset": "0",
"expression": "reviewed P5 ABI"
}
]
},
"main.SNAP_READ_BYTES_HI": {
"access": "RO",
"reset": "0x00000000",
"description": "High 32 bits of P5 successful logical input bytes.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "High read-byte snapshot word.",
"reset": "0",
"expression": "reviewed P5 ABI"
}
]
},
"main.SNAP_WRITE_BYTES_LO": {
"access": "RO",
"reset": "0x00000000",
"description": "Low 32 bits of P5 acknowledged output bytes.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "Low write-byte snapshot word.",
"reset": "0",
"expression": "reviewed P5 ABI"
}
]
},
"main.SNAP_WRITE_BYTES_HI": {
"access": "RO",
"reset": "0x00000000",
"description": "High 32 bits of P5 acknowledged output bytes.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "High write-byte snapshot word.",
"reset": "0",
"expression": "reviewed P5 ABI"
}
]
},
"main.SNAP_READ_STALL_LO": {
"access": "RO",
"reset": "0x00000000",
"description": "Low 32 bits of P5 read-channel stall cycles.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "Low read-stall snapshot word.",
"reset": "0",
"expression": "reviewed P5 ABI"
}
]
},
"main.SNAP_READ_STALL_HI": {
"access": "RO",
"reset": "0x00000000",
"description": "High 32 bits of P5 read-channel stall cycles.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "High read-stall snapshot word.",
"reset": "0",
"expression": "reviewed P5 ABI"
}
]
},
"main.SNAP_WRITE_STALL_LO": {
"access": "RO",
"reset": "0x00000000",
"description": "Low 32 bits of P5 write-channel stall cycles.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "Low write-stall snapshot word.",
"reset": "0",
"expression": "reviewed P5 ABI"
}
]
},
"main.SNAP_WRITE_STALL_HI": {
"access": "RO",
"reset": "0x00000000",
"description": "High 32 bits of P5 write-channel stall cycles.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "High write-stall snapshot word.",
"reset": "0",
"expression": "reviewed P5 ABI"
}
]
},
"main.SNAP_PIPE_STALL_LO": {
"access": "RO",
"reset": "0x00000000",
"description": "Low 32 bits of P5 pixel-pipeline stall cycles.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "Low pipeline-stall snapshot word.",
"reset": "0",
"expression": "reviewed P5 ABI"
}
]
},
"main.SNAP_PIPE_STALL_HI": {
"access": "RO",
"reset": "0x00000000",
"description": "High 32 bits of P5 pixel-pipeline stall cycles.",
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "High pipeline-stall snapshot word.",
"reset": "0",
"expression": "reviewed P5 ABI"
}
]
},
"main.SNAP_LINES_DONE": {
"access": "RO",
"reset": "0x00000000",
"description": "Completed P5 destination rows.",
"fields": [
{
"name": "LINES_DONE",
"lsb": 0,
"msb": 15,
"description": "Completed destination row count.",
"reset": "0",
"expression": "reviewed P5 ABI"
},
{
"name": "Reserved",
"lsb": 16,
"msb": 31,
"description": "Reserved; reads zero.",
"reset": "0",
"expression": "reserved"
}
]
}
},
"crypto": {
"main.MEM_STATUS": {
"access": "RO",
"description": "Storage initialization, verification, scrub, lock and fault state.",
"reset": "0x00000004",
"fields": [
{"lsb": 0, "msb": 0, "name": "READY", "description": "Constants are valid and locked, erasure is complete, and no memory fault is active.", "reset": "0", "expression": "`APB4_CRYPTO__MEM_STATUS_READY"},
{"lsb": 1, "msb": 1, "name": "TABLE_VALID", "description": "The committed constants image passed validation.", "reset": "0", "expression": "`APB4_CRYPTO__MEM_STATUS_TABLE_VALID"},
{"lsb": 2, "msb": 2, "name": "SCRUB_BUSY", "description": "Reset or zeroize scrubbing is active.", "reset": "1", "expression": "`APB4_CRYPTO__MEM_STATUS_SCRUB_BUSY"},
{"lsb": 3, "msb": 3, "name": "LOAD_ACTIVE", "description": "A TABLE_DATA loading transaction is active.", "reset": "0", "expression": "`APB4_CRYPTO__MEM_STATUS_LOAD_ACTIVE"},
{"lsb": 4, "msb": 4, "name": "VERIFY_BUSY", "description": "Full storage readback and CRC verification is active.", "reset": "0", "expression": "`APB4_CRYPTO__MEM_STATUS_VERIFY_BUSY"},
{"lsb": 5, "msb": 5, "name": "TABLE_LOCKED", "description": "The verified constants banks remain locked until hard/PCLK reset; zeroize does not unlock them.", "reset": "0", "expression": "`APB4_CRYPTO__MEM_STATUS_TABLE_LOCKED"},
{"lsb": 6, "msb": 6, "name": "FAULT", "description": "A sticky storage lifecycle fault is active.", "reset": "0", "expression": "`APB4_CRYPTO__MEM_STATUS_FAULT"},
{"lsb": 7, "msb": 31, "name": "Reserved", "description": "Reserved; reads zero.", "reset": "0", "expression": "25'd0"}
]
},
"main.MEM_CONTROL": {
"access": "WO",
"description": "One-hot storage lifecycle command; zero is a no-op.",
"reset": "Not retained (command/data port)",
"fields": [
{"lsb": 0, "msb": 0, "name": "BEGIN", "description": "Begin a new ordered constants load.", "reset": "Not retained", "expression": "`APB4_CRYPTO__MEM_CONTROL_BEGIN"},
{"lsb": 1, "msb": 1, "name": "COMMIT", "description": "Commit the complete image and start readback verification.", "reset": "Not retained", "expression": "`APB4_CRYPTO__MEM_CONTROL_COMMIT"},
{"lsb": 2, "msb": 2, "name": "CANCEL", "description": "Cancel an unlocked load attempt and start cleanup.", "reset": "Not retained", "expression": "`APB4_CRYPTO__MEM_CONTROL_CANCEL"},
{"lsb": 3, "msb": 31, "name": "Reserved", "description": "Reserved; write zero.", "reset": "Not retained", "expression": "29'd0"}
]
},
"main.TABLE_ID": {
"access": "RO",
"description": "Frozen CRYC1 constants-image identity.",
"reset": "0x43525901",
"fields": [
{"lsb": 0, "msb": 31, "name": "ID", "description": "CRYC1 image identifier.", "reset": "0x43525901", "expression": "`APB4_CRYPTO__TABLE_ID_VALUE"}
]
},
"main.TABLE_WORDS": {
"access": "RO",
"description": "Accepted ordered payload word count; BEGIN, CANCEL and reset clear it.",
"reset": "0",
"fields": [
{"lsb": 0, "msb": 11, "name": "WORDS", "description": "Accepted word count from 0 through 2048.", "reset": "0", "expression": "s_table_words"},
{"lsb": 12, "msb": 31, "name": "Reserved", "description": "Reserved; reads zero.", "reset": "0", "expression": "20'd0"}
]
},
"main.TABLE_DATA": {
"access": "WO",
"description": "Auto-incrementing full-word constants loader input.",
"reset": "Not retained (command/data port)",
"fields": [
{"lsb": 0, "msb": 31, "name": "DATA", "description": "Next constants-image word; full PSTRB is required.", "reset": "Not retained", "expression": "write data"}
]
},
"main.TABLE_CRC": {
"access": "RO",
"description": "CRC from the last complete full-storage readback.",
"reset": "0",
"fields": [
{"lsb": 0, "msb": 31, "name": "CRC", "description": "Readback CRC; zero until verification completes.", "reset": "0", "expression": "s_table_crc"}
]
},
"main.MEM_ERROR": {
"access": "RO",
"description": "First storage lifecycle error with physical bank and row context.",
"reset": "0",
"fields": [
{"lsb": 0, "msb": 7, "name": "CODE", "description": "First lifecycle error code; values 1 through 6 are defined.", "reset": "0", "expression": "`APB4_CRYPTO__MEM_ERROR_CODE_MASK"},
{"lsb": 8, "msb": 10, "name": "BANK", "description": "Physical bank index; non-addressed errors report zero.", "reset": "0", "expression": "`APB4_CRYPTO__MEM_ERROR_BANK_MASK"},
{"lsb": 11, "msb": 20, "name": "ROW", "description": "Physical row index; non-addressed errors report zero.", "reset": "0", "expression": "`APB4_CRYPTO__MEM_ERROR_ROW_MASK"},
{"lsb": 21, "msb": 30, "name": "Reserved", "description": "Reserved; reads zero.", "reset": "0", "expression": "10'd0"},
{"lsb": 31, "msb": 31, "name": "VALID", "description": "The first-error record is valid.", "reset": "0", "expression": "`APB4_CRYPTO__MEM_ERROR_VALID"}
]
},
"main.MEM_CYCLES": {
"access": "RO",
"description": "Active PCLK cycles in the current or last verify/scrub operation.",
"reset": "0",
"fields": [
{"lsb": 0, "msb": 31, "name": "CYCLES", "description": "Maintenance cycle count, excluding loader inter-write gaps.", "reset": "0", "expression": "s_mem_cycles"}
]
},
"main.AES_BYTES_IN": {
"access": "RO",
"description": "Accepted AES input byte count.",
"reset": "0",
"fields": [
{"lsb": 0, "msb": 31, "name": "COUNT", "description": "Bytes accepted for the current or last AES operation.", "reset": "0", "expression": "s_aes_bytes_in"}
]
},
"main.AES_BYTES_OUT": {
"access": "RO",
"description": "Consumed AES output byte count.",
"reset": "0",
"fields": [
{"lsb": 0, "msb": 31, "name": "COUNT", "description": "Bytes consumed from the current or last AES operation.", "reset": "0", "expression": "s_aes_bytes_out"}
]
},
"main.AES_CYCLES": {
"access": "RO",
"description": "AES operation cycle count.",
"reset": "0",
"fields": [
{"lsb": 0, "msb": 31, "name": "CYCLES", "description": "Cycles in the current or last AES operation.", "reset": "0", "expression": "s_aes_cycles"}
]
},
"main.SHA_CYCLES": {
"access": "RO",
"description": "SHA operation cycle count.",
"reset": "0",
"fields": [
{"lsb": 0, "msb": 31, "name": "CYCLES", "description": "Cycles in the current or last SHA operation.", "reset": "0", "expression": "s_sha_cycles"}
]
},
"main.RSA_CYCLES": {
"access": "RO",
"description": "RSA operation cycle count.",
"reset": "0",
"fields": [
{"lsb": 0, "msb": 31, "name": "CYCLES", "description": "Cycles in the current or last RSA operation.", "reset": "0", "expression": "s_rsa_cycles"}
]
},
"main.RSA_PROGRESS": {
"access": "RO",
"description": "RSA private-operation flag and exponent position.",
"reset": "0",
"fields": [
{"lsb": 0, "msb": 0, "name": "PRIVATE", "description": "The active operation uses the private exponent path.", "reset": "0", "expression": "s_regs_q.private_operation"},
{"lsb": 1, "msb": 11, "name": "EXPONENT_INDEX", "description": "Current exponent bit position.", "reset": "0", "expression": "s_regs_q.exponent_index"},
{"lsb": 12, "msb": 31, "name": "Reserved", "description": "Reserved; reads zero.", "reset": "0", "expression": "20'd0"}
]
},
"main.COMMAND": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "ZEROIZE",
"description": "Zeroize.",
"reset": "Register reset applies",
"expression": "`APB4_CRYPTO__COMMAND_ZEROIZE"
},
{
"lsb": 1,
"msb": 1,
"name": "ABORT_AES",
"description": "Abort aes.",
"reset": "Register reset applies",
"expression": "`APB4_CRYPTO__COMMAND_ABORT_AES"
},
{
"lsb": 2,
"msb": 2,
"name": "ABORT_SHA",
"description": "Abort sha.",
"reset": "Register reset applies",
"expression": "`APB4_CRYPTO__COMMAND_ABORT_SHA"
},
{
"lsb": 3,
"msb": 3,
"name": "ABORT_RSA",
"description": "Abort rsa.",
"reset": "Register reset applies",
"expression": "`APB4_CRYPTO__COMMAND_ABORT_RSA"
},
{
"lsb": 4,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
},
"main.IRQ_TEST": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "AES_DONE",
"description": "Aes done.",
"reset": "Register reset applies",
"expression": "`APB4_CRYPTO__IRQ_AES_DONE"
},
{
"lsb": 1,
"msb": 1,
"name": "SHA_DONE",
"description": "Sha done.",
"reset": "Register reset applies",
"expression": "`APB4_CRYPTO__IRQ_SHA_DONE"
},
{
"lsb": 2,
"msb": 2,
"name": "RSA_DONE",
"description": "Rsa done.",
"reset": "Register reset applies",
"expression": "`APB4_CRYPTO__IRQ_RSA_DONE"
},
{
"lsb": 3,
"msb": 3,
"name": "ERROR",
"description": "Error.",
"reset": "Register reset applies",
"expression": "`APB4_CRYPTO__IRQ_ERROR"
},
{
"lsb": 4,
"msb": 4,
"name": "ZEROIZED",
"description": "Zeroized.",
"reset": "Register reset applies",
"expression": "`APB4_CRYPTO__IRQ_ZEROIZED"
},
{
"lsb": 5,
"msb": 5,
"name": "MEMORY_READY",
"description": "Writing one injects MEMORY_READY into sticky IRQ state for interrupt-path testing; it is not initialization or physical-erasure completion evidence.",
"reset": "Register reset applies",
"expression": "`APB4_CRYPTO__IRQ_MEMORY_READY"
},
{
"lsb": 6,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "26'd0"
}
],
"reset": "Not retained (command/data port)"
},
"main.AES_CTRL": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "START",
"description": "Start.",
"reset": "Register reset applies",
"expression": "`APB4_CRYPTO__AES_CTRL_START"
},
{
"lsb": 1,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
},
"main.AES_DATA_IN": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "DATA",
"description": "PIO stream word; PSTRB is byte keep",
"reset": "Not retained",
"expression": "write data"
}
],
"reset": "Not retained (command/data port)"
},
"main.AES_KEY_CTRL": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "COMMIT",
"description": "Commit.",
"reset": "Register reset applies",
"expression": "`APB4_CRYPTO__AES_KEY_CTRL_COMMIT"
},
{
"lsb": 1,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
},
"main.SHA_CTRL": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "START",
"description": "Start.",
"reset": "Register reset applies",
"expression": "`APB4_CRYPTO__SHA_CTRL_START"
},
{
"lsb": 1,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
},
"main.SHA_DATA_IN": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "DATA",
"description": "PIO stream word; PSTRB is byte keep",
"reset": "Not retained",
"expression": "write data"
}
],
"reset": "Not retained (command/data port)"
},
"main.RSA_CTRL": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "PREPARE",
"description": "Prepare.",
"reset": "Register reset applies",
"expression": "`APB4_CRYPTO__RSA_CTRL_PREPARE"
},
{
"lsb": 1,
"msb": 1,
"name": "PUBLIC",
"description": "Public.",
"reset": "Register reset applies",
"expression": "`APB4_CRYPTO__RSA_CTRL_PUBLIC"
},
{
"lsb": 2,
"msb": 2,
"name": "PRIVATE",
"description": "Private.",
"reset": "Register reset applies",
"expression": "`APB4_CRYPTO__RSA_CTRL_PRIVATE"
},
{
"lsb": 3,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
},
"main.AES_CFG": {
"fields": [
{
"lsb": 0,
"msb": 1,
"name": "MODE",
"description": "0: ECB; 1: CBC; 2: CTR; 3: invalid.",
"reset": "Register reset applies",
"expression": "rtl/ip/security/apb4_crypto.sv"
},
{
"lsb": 2,
"msb": 2,
"name": "DECRYPT",
"description": "Select inverse transform for ECB/CBC; CTR uses the encryption transform.",
"reset": "Register reset applies",
"expression": "rtl/ip/security/apb4_crypto.sv"
},
{
"lsb": 3,
"msb": 3,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/security/apb4_crypto.sv"
},
{
"lsb": 4,
"msb": 5,
"name": "KEY_SIZE",
"description": "0: 128-bit; 1: 192-bit; 2: 256-bit; 3: invalid.",
"reset": "Register reset applies",
"expression": "rtl/ip/security/apb4_crypto.sv"
},
{
"lsb": 6,
"msb": 7,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/security/apb4_crypto.sv"
},
{
"lsb": 8,
"msb": 8,
"name": "DMA",
"description": "Use the shared stream interface instead of APB data ports.",
"reset": "Register reset applies",
"expression": "rtl/ip/security/apb4_crypto.sv"
},
{
"lsb": 9,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/security/apb4_crypto.sv"
}
],
"review_source": "rtl/ip/security/apb4_crypto.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06.",
"reset": "0"
},
"main.SHA_CFG": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "SHA256",
"description": "1: SHA-256; 0: SHA-224.",
"reset": "Register reset applies",
"expression": "rtl/ip/security/apb4_crypto.sv"
},
{
"lsb": 1,
"msb": 7,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/security/apb4_crypto.sv"
},
{
"lsb": 8,
"msb": 8,
"name": "DMA",
"description": "Use stream input; AES and SHA cannot use the shared DMA stream concurrently.",
"reset": "Register reset applies",
"expression": "rtl/ip/security/apb4_crypto.sv"
},
{
"lsb": 9,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/security/apb4_crypto.sv"
}
],
"review_source": "rtl/ip/security/apb4_crypto.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06.",
"reset": "1"
},
"main.AES_STATUS": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "BUSY",
"description": "Engine busy; AES includes key expansion.",
"reset": "Register reset applies",
"expression": "rtl/ip/security/apb4_crypto.sv"
},
{
"lsb": 1,
"msb": 1,
"name": "DONE",
"description": "Corresponding sticky IRQ_STATE bit.",
"reset": "Register reset applies",
"expression": "rtl/ip/security/apb4_crypto.sv"
},
{
"lsb": 2,
"msb": 2,
"name": "ERROR",
"description": "Engine operation error.",
"reset": "Register reset applies",
"expression": "rtl/ip/security/apb4_crypto.sv"
},
{
"lsb": 3,
"msb": 3,
"name": "KEY_VALID",
"description": "Expanded key is valid.",
"reset": "Register reset applies",
"expression": "rtl/ip/security/apb4_crypto.sv"
},
{
"lsb": 4,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/security/apb4_crypto.sv"
}
],
"review_source": "rtl/ip/security/apb4_crypto.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06."
},
"main.SHA_STATUS": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "BUSY",
"description": "Engine busy; AES includes key expansion.",
"reset": "Register reset applies",
"expression": "rtl/ip/security/apb4_crypto.sv"
},
{
"lsb": 1,
"msb": 1,
"name": "DONE",
"description": "Corresponding sticky IRQ_STATE bit.",
"reset": "Register reset applies",
"expression": "rtl/ip/security/apb4_crypto.sv"
},
{
"lsb": 2,
"msb": 2,
"name": "ERROR",
"description": "Engine operation error.",
"reset": "Register reset applies",
"expression": "rtl/ip/security/apb4_crypto.sv"
},
{
"lsb": 3,
"msb": 3,
"name": "DIGEST_VALID",
"description": "Digest is valid.",
"reset": "Register reset applies",
"expression": "rtl/ip/security/apb4_crypto.sv"
},
{
"lsb": 4,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/security/apb4_crypto.sv"
}
],
"review_source": "rtl/ip/security/apb4_crypto.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06."
},
"main.RSA_STATUS": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "BUSY",
"description": "Engine busy; AES includes key expansion.",
"reset": "Register reset applies",
"expression": "rtl/ip/security/apb4_crypto.sv"
},
{
"lsb": 1,
"msb": 1,
"name": "DONE",
"description": "Corresponding sticky IRQ_STATE bit.",
"reset": "Register reset applies",
"expression": "rtl/ip/security/apb4_crypto.sv"
},
{
"lsb": 2,
"msb": 2,
"name": "ERROR",
"description": "Engine operation error.",
"reset": "Register reset applies",
"expression": "rtl/ip/security/apb4_crypto.sv"
},
{
"lsb": 3,
"msb": 3,
"name": "PREPARED",
"description": "RSA preparation is valid and operands have not been changed.",
"reset": "Register reset applies",
"expression": "rtl/ip/security/apb4_crypto.sv"
},
{
"lsb": 4,
"msb": 4,
"name": "RESULT_VALID",
"description": "Modular exponentiation result is valid.",
"reset": "Register reset applies",
"expression": "rtl/ip/security/apb4_crypto.sv"
},
{
"lsb": 5,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/security/apb4_crypto.sv"
}
],
"review_source": "rtl/ip/security/apb4_crypto.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06."
}
},
"rtc": {
"main.COMMAND": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
},
{
"lsb": 1,
"msb": 1,
"name": "STATUS_DONE",
"description": "Status done.",
"reset": "Register reset applies",
"expression": "`RTC_COMMAND_STATUS_DONE_MASK"
},
{
"lsb": 2,
"msb": 2,
"name": "STATUS_ERROR",
"description": "Status error.",
"reset": "Register reset applies",
"expression": "`RTC_COMMAND_STATUS_ERROR_MASK"
},
{
"lsb": 3,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
},
"main.EVENT_CLEAR": {
"fields": [
{
"name": "MASK",
"lsb": 0,
"msb": 4,
"description": "Write-one mask using the corresponding event/interrupt bit assignments.",
"reset": "Register reset applies",
"expression": "reviewed field"
},
{
"name": "Reserved",
"lsb": 5,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0",
"expression": "reserved"
}
],
"access": "WO",
"reset": "Not retained"
},
"main.EVENT_TEST": {
"fields": [
{
"name": "MASK",
"lsb": 0,
"msb": 4,
"description": "Write-one mask using the corresponding event/interrupt bit assignments.",
"reset": "Register reset applies",
"expression": "reviewed field"
},
{
"name": "Reserved",
"lsb": 5,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0",
"expression": "reserved"
}
],
"access": "WO",
"reset": "Not retained"
},
"main.CALIB_PPM": {
"fields": [
{
"name": "PPM",
"lsb": 0,
"msb": 15,
"description": "Signed two-complement calibration in parts per million; supported interval -488 to +488.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "SIGN",
"lsb": 16,
"msb": 31,
"description": "Sign extension of bit 15 on read.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
}
],
"access": "RW",
"reset": "0"
},
"main.CTRL": {
"reset": "0"
},
"main.TIME_LOAD_LO": {
"reset": "0"
},
"main.TIME_LOAD_HI": {
"reset": "0"
},
"main.TIME_LOAD_SUBSEC": {
"reset": "0"
},
"main.ALARM0_TIME_LO": {
"reset": "0"
},
"main.ALARM0_TIME_HI": {
"reset": "0"
},
"main.ALARM0_SUBSEC": {
"reset": "0"
},
"main.ALARM1_TIME_LO": {
"reset": "0"
},
"main.ALARM1_TIME_HI": {
"reset": "0"
},
"main.ALARM1_SUBSEC": {
"reset": "0"
},
"main.ALARM_ENABLE": {
"reset": "0"
},
"main.PERIOD_RELOAD": {
"reset": "0"
},
"main.PERIOD_CTRL": {
"reset": "0"
},
"main.INTR_ENABLE": {
"reset": "0"
},
"main.WAKE_ENABLE": {
"reset": "0"
},
"main.SECOND_CYCLES": {
"reset": "18432000",
"notes": "Reset comes from the RTC_CLOCK_HZ integration parameter; it is not a 32.768 kHz oscillator assumption."
},
"main.INTR_STATE": {
"access": "RO"
},
"main.WAKE_STATE": {
"access": "RO"
}
},
"wdg": {
"main.CTRL": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "START",
"description": "Start.",
"reset": "Register reset applies",
"expression": "`WDG_CTRL_START_MASK"
},
{
"lsb": 1,
"msb": 1,
"name": "SNAPSHOT",
"description": "Snapshot.",
"reset": "Register reset applies",
"expression": "`WDG_CTRL_SNAPSHOT_MASK"
},
{
"lsb": 2,
"msb": 2,
"name": "CLEAR_CAUSE",
"description": "Clear cause.",
"reset": "Register reset applies",
"expression": "`WDG_CTRL_CLEAR_CAUSE_MASK"
},
{
"lsb": 3,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
},
"main.SERVICE": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "KEY",
"description": "Two-key watchdog service port.",
"reset": "Not retained",
"expression": "write data"
}
],
"reset": "Not retained (command/data port)"
},
"main.INTR_TEST": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "WARNING",
"description": "Warning.",
"reset": "Register reset applies",
"expression": "`WDG_INTR_WARNING_MASK"
},
{
"lsb": 1,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
}
},
"pwm": {
"main.COMMAND": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "UPDATE",
"description": "Update.",
"reset": "Register reset applies",
"expression": "`PWM_COMMAND_UPDATE_MASK"
},
{
"lsb": 1,
"msb": 1,
"name": "SYNC",
"description": "Sync.",
"reset": "Register reset applies",
"expression": "`PWM_COMMAND_SYNC_MASK"
},
{
"lsb": 2,
"msb": 2,
"name": "FAULT_TEST",
"description": "Fault test.",
"reset": "Register reset applies",
"expression": "`PWM_COMMAND_FAULT_TEST_MASK"
},
{
"lsb": 3,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
},
"main.INTR_TEST": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "TIMER0_ZERO",
"description": "Timer0 zero.",
"reset": "Register reset applies",
"expression": "`PWM_INTR_TIMER0_ZERO_MASK"
},
{
"lsb": 1,
"msb": 1,
"name": "TIMER1_ZERO",
"description": "Timer1 zero.",
"reset": "Register reset applies",
"expression": "`PWM_INTR_TIMER1_ZERO_MASK"
},
{
"lsb": 2,
"msb": 2,
"name": "TIMER0_PERIOD",
"description": "Timer0 period.",
"reset": "Register reset applies",
"expression": "`PWM_INTR_TIMER0_PERIOD_MASK"
},
{
"lsb": 3,
"msb": 3,
"name": "TIMER1_PERIOD",
"description": "Timer1 period.",
"reset": "Register reset applies",
"expression": "`PWM_INTR_TIMER1_PERIOD_MASK"
},
{
"lsb": 4,
"msb": 4,
"name": "TIMER0_UPDATE",
"description": "Timer0 update.",
"reset": "Register reset applies",
"expression": "`PWM_INTR_TIMER0_UPDATE_MASK"
},
{
"lsb": 5,
"msb": 5,
"name": "TIMER1_UPDATE",
"description": "Timer1 update.",
"reset": "Register reset applies",
"expression": "`PWM_INTR_TIMER1_UPDATE_MASK"
},
{
"lsb": 6,
"msb": 6,
"name": "FADE0_DONE",
"description": "Fade0 done.",
"reset": "Register reset applies",
"expression": "`PWM_INTR_FADE0_DONE_MASK"
},
{
"lsb": 7,
"msb": 7,
"name": "FADE1_DONE",
"description": "Fade1 done.",
"reset": "Register reset applies",
"expression": "`PWM_INTR_FADE1_DONE_MASK"
},
{
"lsb": 8,
"msb": 8,
"name": "FADE2_DONE",
"description": "Fade2 done.",
"reset": "Register reset applies",
"expression": "`PWM_INTR_FADE2_DONE_MASK"
},
{
"lsb": 9,
"msb": 9,
"name": "FADE3_DONE",
"description": "Fade3 done.",
"reset": "Register reset applies",
"expression": "`PWM_INTR_FADE3_DONE_MASK"
},
{
"lsb": 10,
"msb": 10,
"name": "FAULT",
"description": "Fault.",
"reset": "Register reset applies",
"expression": "`PWM_INTR_FAULT_MASK"
},
{
"lsb": 11,
"msb": 11,
"name": "CAPTURE0",
"description": "Capture0.",
"reset": "Register reset applies",
"expression": "`PWM_INTR_CAPTURE0_MASK"
},
{
"lsb": 12,
"msb": 12,
"name": "CAPTURE1",
"description": "Capture1.",
"reset": "Register reset applies",
"expression": "`PWM_INTR_CAPTURE1_MASK"
},
{
"lsb": 13,
"msb": 13,
"name": "CAPTURE0_OVERFLOW",
"description": "Capture0 overflow.",
"reset": "Register reset applies",
"expression": "`PWM_INTR_CAPTURE0_OVERFLOW_MASK"
},
{
"lsb": 14,
"msb": 14,
"name": "CAPTURE1_OVERFLOW",
"description": "Capture1 overflow.",
"reset": "Register reset applies",
"expression": "`PWM_INTR_CAPTURE1_OVERFLOW_MASK"
},
{
"lsb": 15,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
},
"main.FAULT_CLEAR": {
"fields": [
{
"name": "CLEAR",
"lsb": 0,
"msb": 0,
"description": "Write one to clear the one-shot fault latch when permitted by fault policy.",
"reset": "Register reset applies",
"expression": "reviewed field"
},
{
"name": "Reserved",
"lsb": 1,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0",
"expression": "reserved"
}
],
"access": "WO",
"reset": "Not retained"
},
"main.CTRL": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "ENABLE",
"description": "Enable.",
"reset": "0x0",
"expression": "`PWM_CTRL_ENABLE_MASK"
},
{
"lsb": 1,
"msb": 1,
"name": "DEBUG_FREEZE",
"description": "Debug freeze.",
"reset": "0x0",
"expression": "`PWM_CTRL_DEBUG_FREEZE_MASK"
},
{
"lsb": 2,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0x0",
"expression": "s_ctrl_q"
}
]
},
"main.FAULT_STATUS": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "RAW",
"description": "Raw fault input.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv"
},
{
"lsb": 1,
"msb": 1,
"name": "SYNCHRONIZED",
"description": "Synchronized active-polarity fault.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv"
},
{
"lsb": 2,
"msb": 2,
"name": "FILTERED",
"description": "Fault after digital filtering.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv"
},
{
"lsb": 3,
"msb": 3,
"name": "LATCHED",
"description": "One-shot fault latch.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv"
},
{
"lsb": 4,
"msb": 4,
"name": "KILL",
"description": "Fault currently forces safe output values.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv"
},
{
"lsb": 5,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv"
}
],
"review_source": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06."
},
"main.OUTPUT_STATUS": {
"fields": [
{
"lsb": 0,
"msb": 3,
"name": "OUTPUT",
"description": "Four driven PWM values.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv"
},
{
"lsb": 4,
"msb": 7,
"name": "OUTPUT_ENABLE",
"description": "Four output-enable values.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv"
},
{
"lsb": 8,
"msb": 11,
"name": "RAW_CHANNEL",
"description": "Raw channel waveform values.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv"
},
{
"lsb": 12,
"msb": 15,
"name": "DEADTIME_OUTPUT",
"description": "Complementary/dead-time output values.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv"
},
{
"lsb": 16,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv"
}
],
"review_source": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06."
},
"main.CAPTURE_STATUS": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "ENABLE",
"description": "Capture timebase enabled.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv"
},
{
"lsb": 1,
"msb": 2,
"name": "EMPTY",
"description": "One empty bit per capture FIFO.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv"
},
{
"lsb": 3,
"msb": 4,
"name": "FULL",
"description": "One full bit per capture FIFO.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv"
},
{
"lsb": 5,
"msb": 6,
"name": "WATERMARK",
"description": "One watermark indication per capture FIFO.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv"
},
{
"lsb": 7,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv"
}
],
"review_source": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06."
},
"main.CAPTURE0_CTRL": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "ENABLE",
"description": "Enable this capture channel.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_capture.sv"
},
{
"lsb": 1,
"msb": 1,
"name": "RISE",
"description": "Capture rising edges.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_capture.sv"
},
{
"lsb": 2,
"msb": 2,
"name": "FALL",
"description": "Capture falling edges.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_capture.sv"
},
{
"lsb": 3,
"msb": 3,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_capture.sv"
},
{
"lsb": 4,
"msb": 7,
"name": "FILTER",
"description": "Required stable input count.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_capture.sv"
},
{
"lsb": 8,
"msb": 10,
"name": "WATERMARK",
"description": "FIFO interrupt threshold; zero is interpreted as one. FIFO depth is four.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_capture.sv"
},
{
"lsb": 11,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_capture.sv"
}
],
"review_source": "rtl/managed/clusterip/pwm/rtl/pwm_capture.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06.",
"reset": "0"
},
"main.CAPTURE0_STATUS": {
"fields": [
{
"lsb": 0,
"msb": 2,
"name": "LEVEL",
"description": "Number of timestamps held in the FIFO.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv"
},
{
"lsb": 3,
"msb": 3,
"name": "EMPTY",
"description": "FIFO contains no timestamp.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv"
},
{
"lsb": 4,
"msb": 4,
"name": "FULL",
"description": "FIFO is full.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv"
},
{
"lsb": 5,
"msb": 5,
"name": "WATERMARK",
"description": "Enabled channel has reached its watermark.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv"
},
{
"lsb": 6,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv"
}
],
"review_source": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06."
},
"main.CAPTURE1_CTRL": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "ENABLE",
"description": "Enable this capture channel.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_capture.sv"
},
{
"lsb": 1,
"msb": 1,
"name": "RISE",
"description": "Capture rising edges.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_capture.sv"
},
{
"lsb": 2,
"msb": 2,
"name": "FALL",
"description": "Capture falling edges.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_capture.sv"
},
{
"lsb": 3,
"msb": 3,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_capture.sv"
},
{
"lsb": 4,
"msb": 7,
"name": "FILTER",
"description": "Required stable input count.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_capture.sv"
},
{
"lsb": 8,
"msb": 10,
"name": "WATERMARK",
"description": "FIFO interrupt threshold; zero is interpreted as one. FIFO depth is four.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_capture.sv"
},
{
"lsb": 11,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_capture.sv"
}
],
"review_source": "rtl/managed/clusterip/pwm/rtl/pwm_capture.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06.",
"reset": "0"
},
"main.CAPTURE1_STATUS": {
"fields": [
{
"lsb": 0,
"msb": 2,
"name": "LEVEL",
"description": "Number of timestamps held in the FIFO.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv"
},
{
"lsb": 3,
"msb": 3,
"name": "EMPTY",
"description": "FIFO contains no timestamp.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv"
},
{
"lsb": 4,
"msb": 4,
"name": "FULL",
"description": "FIFO is full.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv"
},
{
"lsb": 5,
"msb": 5,
"name": "WATERMARK",
"description": "Enabled channel has reached its watermark.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv"
},
{
"lsb": 6,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv"
}
],
"review_source": "rtl/managed/clusterip/pwm/rtl/pwm_core.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06."
},
"channel.ACTION": {
"fields": [
{
"lsb": 0,
"msb": 1,
"name": "ZERO",
"description": "0: hold; 1: low; 2: high; 3: toggle on this event.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_channel.sv"
},
{
"lsb": 2,
"msb": 3,
"name": "PERIOD",
"description": "0: hold; 1: low; 2: high; 3: toggle on this event.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_channel.sv"
},
{
"lsb": 4,
"msb": 5,
"name": "PHASE_UP",
"description": "0: hold; 1: low; 2: high; 3: toggle on this event.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_channel.sv"
},
{
"lsb": 6,
"msb": 7,
"name": "DUTY_UP",
"description": "0: hold; 1: low; 2: high; 3: toggle on this event.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_channel.sv"
},
{
"lsb": 8,
"msb": 9,
"name": "PHASE_DOWN",
"description": "0: hold; 1: low; 2: high; 3: toggle on this event.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_channel.sv"
},
{
"lsb": 10,
"msb": 11,
"name": "DUTY_DOWN",
"description": "0: hold; 1: low; 2: high; 3: toggle on this event.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_channel.sv"
},
{
"lsb": 12,
"msb": 13,
"name": "SYNC",
"description": "0: hold; 1: low; 2: high; 3: toggle on this event.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_channel.sv"
},
{
"lsb": 14,
"msb": 15,
"name": "FADE_DONE",
"description": "0: hold; 1: low; 2: high; 3: toggle on this event.",
"reset": "Register reset applies",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_channel.sv"
},
{
"lsb": 16,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/managed/clusterip/pwm/rtl/pwm_channel.sv"
}
],
"review_source": "rtl/managed/clusterip/pwm/rtl/pwm_channel.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06.",
"reset": "0"
}
},
"crc": {
"main.CTRL": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "START",
"description": "Start.",
"reset": "Register reset applies",
"expression": "`CRC_CTRL_START_MASK"
},
{
"lsb": 1,
"msb": 1,
"name": "FINISH",
"description": "Finish.",
"reset": "Register reset applies",
"expression": "`CRC_CTRL_FINISH_MASK"
},
{
"lsb": 2,
"msb": 2,
"name": "ABORT",
"description": "Abort.",
"reset": "Register reset applies",
"expression": "`CRC_CTRL_ABORT_MASK"
},
{
"lsb": 3,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
},
"main.DATA": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "DATA",
"description": "Streaming 1-, 2-, or 4-byte input",
"reset": "Not retained",
"expression": "write data"
}
],
"reset": "Not retained (command/data port)"
}
},
"rng": {
"main.INTR_TEST": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "DATA_READY",
"description": "Data ready.",
"reset": "Register reset applies",
"expression": "`RNG_INTR_DATA_READY_MASK"
},
{
"lsb": 1,
"msb": 1,
"name": "HEALTH_FAIL",
"description": "Health fail.",
"reset": "Register reset applies",
"expression": "`RNG_INTR_HEALTH_FAIL_MASK"
},
{
"lsb": 2,
"msb": 2,
"name": "SOURCE_FAULT",
"description": "Source fault.",
"reset": "Register reset applies",
"expression": "`RNG_INTR_SOURCE_FAULT_MASK"
},
{
"lsb": 3,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
}
},
"ps2": {
"main.FIFO_CTRL": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "RX_FLUSH",
"description": "Rx flush.",
"reset": "Register reset applies",
"expression": "`PS2_FIFO_CTRL_RX_FLUSH_MASK"
},
{
"lsb": 1,
"msb": 1,
"name": "TX_FLUSH",
"description": "Tx flush.",
"reset": "Register reset applies",
"expression": "`PS2_FIFO_CTRL_TX_FLUSH_MASK"
},
{
"lsb": 2,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
},
"main.COMMAND": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "ABORT",
"description": "Abort.",
"reset": "Register reset applies",
"expression": "`PS2_COMMAND_ABORT_MASK"
},
{
"lsb": 1,
"msb": 1,
"name": "SOFT_RESET",
"description": "Soft reset.",
"reset": "Register reset applies",
"expression": "`PS2_COMMAND_SOFT_RESET_MASK"
},
{
"lsb": 2,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
},
"main.INTR_TEST": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "RX_WATERMARK",
"description": "Rx watermark.",
"reset": "Register reset applies",
"expression": "`PS2_INTR_RX_WATERMARK_MASK"
},
{
"lsb": 1,
"msb": 1,
"name": "TX_WATERMARK",
"description": "Tx watermark.",
"reset": "Register reset applies",
"expression": "`PS2_INTR_TX_WATERMARK_MASK"
},
{
"lsb": 2,
"msb": 2,
"name": "TX_DONE",
"description": "Tx done.",
"reset": "Register reset applies",
"expression": "`PS2_INTR_TX_DONE_MASK"
},
{
"lsb": 3,
"msb": 3,
"name": "RX_ERROR",
"description": "Rx error.",
"reset": "Register reset applies",
"expression": "`PS2_INTR_RX_ERROR_MASK"
},
{
"lsb": 4,
"msb": 4,
"name": "TX_ERROR",
"description": "Tx error.",
"reset": "Register reset applies",
"expression": "`PS2_INTR_TX_ERROR_MASK"
},
{
"lsb": 5,
"msb": 5,
"name": "BUS_ERROR",
"description": "Bus error.",
"reset": "Register reset applies",
"expression": "`PS2_INTR_BUS_ERROR_MASK"
},
{
"lsb": 6,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "Not retained",
"expression": "32'd0"
}
],
"reset": "Not retained (command/data port)"
},
"main.TXDATA": {
"fields": [
{
"name": "DATA",
"lsb": 0,
"msb": 7,
"description": "Byte to enqueue in the PS/2 transmit FIFO.",
"reset": "Register reset applies",
"expression": "reviewed field"
},
{
"name": "Reserved",
"lsb": 8,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0",
"expression": "reserved"
}
],
"access": "WO",
"reset": "Not retained"
},
"main.INHIBIT_CYCLES": {
"reset": "8640"
},
"main.FRAME_TIMEOUT": {
"reset": "144000"
}
},
"gpio": {
"user.DATA_IN": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Synchronized and filtered pin inputs.",
"reset": "0",
"expression": "32-pin bitmap"
}
]
},
"user.DATA_OUT": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Software output latch.",
"reset": "0",
"expression": "32-pin bitmap"
}
]
},
"user.OUT_SET": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Atomically set output-latch bits.",
"reset": "0",
"expression": "32-pin bitmap"
}
]
},
"user.OUT_CLEAR": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Atomically clear output-latch bits.",
"reset": "0",
"expression": "32-pin bitmap"
}
]
},
"user.OUT_TOGGLE": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Atomically toggle output-latch bits.",
"reset": "0",
"expression": "32-pin bitmap"
}
]
},
"user.INTR_STATE": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Sticky raw interrupt state.",
"reset": "0",
"expression": "32-pin bitmap"
}
]
},
"user.INTR_STATUS": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. INTR_STATE & INTR_ENABLE.",
"reset": "0",
"expression": "32-pin bitmap"
}
]
},
"user.INTR_ENABLE": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Per-pin interrupt enable.",
"reset": "0",
"expression": "32-pin bitmap"
}
]
},
"user.INTR_ENABLE_SET": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Atomically set interrupt-enable bits.",
"reset": "0",
"expression": "32-pin bitmap"
}
]
},
"user.INTR_ENABLE_CLEAR": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Atomically clear interrupt-enable bits.",
"reset": "0",
"expression": "32-pin bitmap"
}
]
},
"admin.DATA_IN": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Synchronized and filtered inputs.",
"reset": "0x0",
"expression": "32-pin bitmap"
}
]
},
"admin.DATA_OUT": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Software output latch.",
"reset": "0x0",
"expression": "32-pin bitmap"
}
]
},
"admin.OUT_SET": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Atomic output set.",
"reset": "-",
"expression": "32-pin bitmap"
}
]
},
"admin.OUT_CLEAR": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Atomic output clear.",
"reset": "-",
"expression": "32-pin bitmap"
}
]
},
"admin.OUT_TOGGLE": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Atomic output toggle.",
"reset": "-",
"expression": "32-pin bitmap"
}
]
},
"admin.OUTPUT_ENABLE": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Software output-enable latch.",
"reset": "0x0",
"expression": "32-pin bitmap"
}
]
},
"admin.OE_SET": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Atomic output-enable set.",
"reset": "-",
"expression": "32-pin bitmap"
}
]
},
"admin.OE_CLEAR": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Atomic output-enable clear.",
"reset": "-",
"expression": "32-pin bitmap"
}
]
},
"admin.OE_TOGGLE": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Atomic output-enable toggle.",
"reset": "-",
"expression": "32-pin bitmap"
}
]
},
"admin.OPEN_DRAIN": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Drive zero for output low and release for output high.",
"reset": "0x0",
"expression": "32-pin bitmap"
}
]
},
"admin.INPUT_CMOS": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Select the PDK CMOS input characteristic when supported.",
"reset": "0x0",
"expression": "32-pin bitmap"
}
]
},
"admin.PULL_UP": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Enable pad pull-up when supported.",
"reset": "0x0",
"expression": "32-pin bitmap"
}
]
},
"admin.PULL_DOWN": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Enable pad pull-down when supported.",
"reset": "0x0",
"expression": "32-pin bitmap"
}
]
},
"admin.ALT_ENABLE": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Select an alternate function instead of software output.",
"reset": "0x0",
"expression": "32-pin bitmap"
}
]
},
"admin.ALT_SELECT": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Select ALT1 when set and ALT0 when clear.",
"reset": "0x0",
"expression": "32-pin bitmap"
}
]
},
"admin.USER_SELECT": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Select user-IP pad ownership.",
"reset": "0x0",
"expression": "32-pin bitmap"
}
]
},
"admin.USER_LOCK": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Permanently lock USER_SELECT bits until reset.",
"reset": "0x0",
"expression": "32-pin bitmap"
}
]
},
"admin.USER_STATUS": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Active user ownership after the handoff guard cycle.",
"reset": "0x0",
"expression": "32-pin bitmap"
}
]
},
"admin.USER_ACCESS_MASK": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Permit user-window data and interrupt bits.",
"reset": "0x0",
"expression": "32-pin bitmap"
}
]
},
"admin.INTR_RISE_ENABLE": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Rising-edge event selection.",
"reset": "0x0",
"expression": "32-pin bitmap"
}
]
},
"admin.INTR_FALL_ENABLE": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Falling-edge event selection.",
"reset": "0x0",
"expression": "32-pin bitmap"
}
]
},
"admin.INTR_HIGH_ENABLE": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. High-level event selection.",
"reset": "0x0",
"expression": "32-pin bitmap"
}
]
},
"admin.INTR_LOW_ENABLE": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Low-level event selection.",
"reset": "0x0",
"expression": "32-pin bitmap"
}
]
},
"admin.INTR_ENABLE": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Per-pin interrupt output enable.",
"reset": "0x0",
"expression": "32-pin bitmap"
}
]
},
"admin.INTR_STATE": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Sticky raw interrupt state. Events win over clear.",
"reset": "0x0",
"expression": "32-pin bitmap"
}
]
},
"admin.INTR_STATUS": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Enabled interrupt state.",
"reset": "0x0",
"expression": "32-pin bitmap"
}
]
},
"admin.INTR_TEST": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Write-one software interrupt test.",
"reset": "-",
"expression": "32-pin bitmap"
}
]
},
"admin.FILTER_ENABLE": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Enable the digital stability filter per pin.",
"reset": "0x0",
"expression": "32-pin bitmap"
}
]
},
"admin.CONFIG_LOCK": {
"fields": [
{
"lsb": 0,
"msb": 31,
"name": "PIN[31:0]",
"description": "Bit n applies to GPIO n. Permanently lock per-pin configuration until reset.",
"reset": "0x0",
"expression": "32-pin bitmap"
}
]
}
},
"timer": {
"main.INTR_TEST": {
"fields": [
{
"name": "MASK",
"lsb": 0,
"msb": 2,
"description": "Write-one mask using the corresponding event/interrupt bit assignments.",
"reset": "Register reset applies",
"expression": "reviewed field"
},
{
"name": "Reserved",
"lsb": 3,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0",
"expression": "reserved"
}
],
"access": "WO",
"reset": "Not retained"
},
"main.CTRL": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "ENABLE",
"description": "Enable.",
"reset": "0x0",
"expression": "s_ctrl_q[`TIMER_CTRL_ENABLE]"
},
{
"lsb": 1,
"msb": 2,
"name": "MODE",
"description": "Mode.",
"reset": "0x0",
"expression": "s_ctrl_q[2:1]"
},
{
"lsb": 3,
"msb": 3,
"name": "DIRECTION",
"description": "Direction.",
"reset": "0x0",
"expression": "s_ctrl_q[`TIMER_CTRL_DIRECTION]"
},
{
"lsb": 4,
"msb": 4,
"name": "DEBUG_FREEZE_ENABLE",
"description": "Debug freeze enable.",
"reset": "0x0",
"expression": "s_ctrl_q[`TIMER_CTRL_DEBUG_FREEZE]"
},
{
"lsb": 5,
"msb": 5,
"name": "COMPARE0_ENABLE",
"description": "Compare0 enable.",
"reset": "0x0",
"expression": "s_ctrl_q[`TIMER_CTRL_COMPARE0_ENABLE]"
},
{
"lsb": 6,
"msb": 6,
"name": "COMPARE1_ENABLE",
"description": "Compare1 enable.",
"reset": "0x0",
"expression": "s_ctrl_q[`TIMER_CTRL_COMPARE1_ENABLE]"
},
{
"lsb": 7,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0x0",
"expression": "s_ctrl_q"
}
]
}
},
"sdram": {
"main.INTR_TEST": {
"fields": [
{
"name": "INIT_DONE",
"lsb": 0,
"msb": 0,
"description": "Write one to request init done.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "ERROR",
"lsb": 1,
"msb": 1,
"description": "Write one to request error.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 2,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"access": "WO",
"reset": "Not retained"
},
"main.COMMAND": {
"fields": [
{
"name": "INIT",
"lsb": 0,
"msb": 0,
"description": "Write one to request init.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "REINIT",
"lsb": 1,
"msb": 1,
"description": "Write one to request reinit.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "PRECHARGE_ALL",
"lsb": 2,
"msb": 2,
"description": "Write one to request precharge all.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "REFRESH",
"lsb": 3,
"msb": 3,
"description": "Write one to request refresh.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 4,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"access": "WO",
"reset": "Not retained"
},
"main.CTRL": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "CONTROLLER_ENABLE",
"description": "Controller enable.",
"reset": "0x1",
"expression": "s_ctrl_q[`APB4_SDRAM__CTRL_ENABLE]"
},
{
"lsb": 1,
"msb": 1,
"name": "MEMORY_ENABLE",
"description": "Memory enable.",
"reset": "0x1",
"expression": "s_ctrl_q[`APB4_SDRAM__CTRL_MEMORY_ENABLE]"
},
{
"lsb": 2,
"msb": 2,
"name": "AUTO_INIT",
"description": "Auto init.",
"reset": "0x1",
"expression": "s_ctrl_q[`APB4_SDRAM__CTRL_AUTO_INIT]"
},
{
"lsb": 3,
"msb": 3,
"name": "OPEN_PAGE",
"description": "Open page.",
"reset": "0x0",
"expression": "s_ctrl_q[`APB4_SDRAM__CTRL_OPEN_PAGE]"
},
{
"lsb": 4,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0x0",
"expression": "s_ctrl_q"
}
]
}
},
"dvp": {
"main.INTR_TEST": {
"fields": [
{
"name": "FRAME_START",
"lsb": 0,
"msb": 0,
"description": "Write one to request frame start.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "LINE_DONE",
"lsb": 1,
"msb": 1,
"description": "Write one to request line done.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "FRAME_DONE",
"lsb": 2,
"msb": 2,
"description": "Write one to request frame done.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "OVERFLOW",
"lsb": 3,
"msb": 3,
"description": "Write one to request overflow.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "SYNC_ERROR",
"lsb": 4,
"msb": 4,
"description": "Write one to request sync error.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "CONFIG_ERROR",
"lsb": 5,
"msb": 5,
"description": "Write one to request config error.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "ABORTED",
"lsb": 6,
"msb": 6,
"description": "Write one to request aborted.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 7,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"access": "WO",
"reset": "Not retained"
},
"main.COMMAND": {
"fields": [
{
"name": "ABORT",
"lsb": 0,
"msb": 0,
"description": "Write one to request abort.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "FLUSH",
"lsb": 1,
"msb": 1,
"description": "Write one to request flush.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 2,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"access": "WO",
"reset": "Not retained"
},
"main.CTRL": {
"fields": [
{
"name": "ENABLE",
"lsb": 0,
"msb": 0,
"description": "Enable capture.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "SNAPSHOT",
"lsb": 1,
"msb": 1,
"description": "Select single-frame capture.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "CROP_ENABLE",
"lsb": 2,
"msb": 2,
"description": "Enable the programmed crop rectangle.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 3,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"reset": "0"
},
"main.SYNC_CFG": {
"fields": [
{
"name": "VSYNC_LOW",
"lsb": 0,
"msb": 0,
"description": "VSYNC is active low when set.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "HREF_LOW",
"lsb": 1,
"msb": 1,
"description": "HREF is active low when set.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "PCLK_FALLING",
"lsb": 2,
"msb": 2,
"description": "Sample on the falling pixel-clock edge when set.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 3,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"reset": "0"
},
"main.STREAM_CTRL": {
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "STREAM_ENABLE",
"description": "Stream enable.",
"reset": "0x0",
"expression": "s_stream_q[`APB4_DVP__STREAM_ENABLE]"
},
{
"lsb": 1,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0x0",
"expression": "s_stream_q"
}
]
},
"main.FORMAT": {
"fields": [
{
"lsb": 0,
"msb": 1,
"name": "SELECT",
"description": "0: RGB565; 1: YUV422. Other values are invalid.",
"reset": "Register reset applies",
"expression": "rtl/ip/multimedia/dvp_reg.sv"
},
{
"lsb": 2,
"msb": 2,
"name": "BYTE_SWAP",
"description": "Swap the two received bytes in a pixel.",
"reset": "Register reset applies",
"expression": "rtl/ip/multimedia/dvp_reg.sv"
},
{
"lsb": 3,
"msb": 3,
"name": "PIXEL_SWAP",
"description": "Retained format flag. The current core computes the same byte order in both branches; toggling this bit alone has no independent effect.",
"reset": "Register reset applies",
"expression": "rtl/ip/multimedia/dvp_reg.sv"
},
{
"lsb": 4,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/multimedia/dvp_reg.sv"
}
],
"review_source": "rtl/ip/multimedia/dvp_reg.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06.",
"reset": "0"
},
"main.FRAME_SIZE": {
"fields": [
{
"lsb": 0,
"msb": 15,
"name": "WIDTH",
"description": "Width in pixels.",
"reset": "Register reset applies",
"expression": "rtl/ip/multimedia/dvp_reg.sv"
},
{
"lsb": 16,
"msb": 31,
"name": "HEIGHT",
"description": "Height in lines.",
"reset": "Register reset applies",
"expression": "rtl/ip/multimedia/dvp_reg.sv"
}
],
"review_source": "rtl/ip/multimedia/dvp_reg.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06.",
"reset": "0"
},
"main.CROP_SIZE": {
"fields": [
{
"lsb": 0,
"msb": 15,
"name": "WIDTH",
"description": "Width in pixels.",
"reset": "Register reset applies",
"expression": "rtl/ip/multimedia/dvp_reg.sv"
},
{
"lsb": 16,
"msb": 31,
"name": "HEIGHT",
"description": "Height in lines.",
"reset": "Register reset applies",
"expression": "rtl/ip/multimedia/dvp_reg.sv"
}
],
"review_source": "rtl/ip/multimedia/dvp_reg.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06.",
"reset": "0"
}
},
"mailbox": {
"main.LP_INTR_TEST": {
"fields": [
{
"name": "MASK",
"lsb": 0,
"msb": 0,
"description": "Write-one mask using the corresponding event/interrupt bit assignments.",
"reset": "Register reset applies",
"expression": "reviewed field"
},
{
"name": "Reserved",
"lsb": 1,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0",
"expression": "reserved"
}
],
"access": "WO",
"reset": "Not retained"
},
"main.HP_INTR_TEST": {
"fields": [
{
"name": "MASK",
"lsb": 0,
"msb": 0,
"description": "Write-one mask using the corresponding event/interrupt bit assignments.",
"reset": "Register reset applies",
"expression": "reviewed field"
},
{
"name": "Reserved",
"lsb": 1,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0",
"expression": "reserved"
}
],
"access": "WO",
"reset": "Not retained"
},
"main.LP_DOORBELL": {
"fields": [
{
"name": "MASK",
"lsb": 0,
"msb": 0,
"description": "Write one to notify the receiving hart; payload must be published before the doorbell.",
"reset": "Register reset applies",
"expression": "reviewed field"
},
{
"name": "Reserved",
"lsb": 1,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0",
"expression": "reserved"
}
],
"access": "WO",
"reset": "Not retained"
},
"main.HP_DOORBELL": {
"fields": [
{
"name": "MASK",
"lsb": 0,
"msb": 0,
"description": "Write one to notify the receiving hart; payload must be published before the doorbell.",
"reset": "Register reset applies",
"expression": "reviewed field"
},
{
"name": "Reserved",
"lsb": 1,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0",
"expression": "reserved"
}
],
"access": "WO",
"reset": "Not retained"
},
"main.LP_INTR_STATUS": {
"access": "RO"
},
"main.HP_INTR_STATUS": {
"access": "RO"
}
},
"clint": {
"msip.MSIP": {
"fields": [
{
"name": "PENDING",
"lsb": 0,
"msb": 0,
"description": "Machine software-interrupt request for this hart.",
"reset": "0x0",
"expression": "reviewed field"
},
{
"name": "Reserved",
"lsb": 1,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0x0",
"expression": "reserved"
}
],
"access": "RW",
"reset": "0",
"description": "Per-hart software interrupt pending bit."
},
"compare.MTIMECMP": {
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "Comparator bits 31:0.",
"reset": "0xffffffff",
"expression": "reviewed field"
}
],
"access": "RW",
"reset": "0xFFFFFFFF",
"description": "Comparator bits 31:0."
},
"main.MTIME": {
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "Machine time bits 31:0.",
"reset": "0x0",
"expression": "reviewed field"
}
],
"access": "RW",
"reset": "0",
"description": "Machine time bits 31:0."
},
"main.MTIMEH": {
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "Machine time bits 63:32.",
"reset": "0x0",
"expression": "reviewed field"
}
],
"access": "RW",
"reset": "0",
"description": "Machine time bits 63:32."
}
},
"aclint": {
"msip.MSIP": {
"fields": [
{
"name": "PENDING",
"lsb": 0,
"msb": 0,
"description": "Machine software-interrupt request for this hart.",
"reset": "0x0",
"expression": "reviewed field"
},
{
"name": "Reserved",
"lsb": 1,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0x0",
"expression": "reserved"
}
],
"access": "RW",
"reset": "0",
"description": "Per-hart software interrupt pending bit."
},
"compare.MTIMECMP": {
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "Comparator bits 31:0.",
"reset": "0xffffffff",
"expression": "reviewed field"
}
],
"access": "RW",
"reset": "0xFFFFFFFF",
"description": "Comparator bits 31:0."
},
"main.MTIME": {
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "Machine time bits 31:0.",
"reset": "0x0",
"expression": "reviewed field"
}
],
"access": "RW",
"reset": "0",
"description": "Machine time bits 31:0."
},
"main.MTIMEH": {
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "Machine time bits 63:32.",
"reset": "0x0",
"expression": "reviewed field"
}
],
"access": "RW",
"reset": "0",
"description": "Machine time bits 63:32."
}
},
"mpw-timer": {
"main.USER_IP_APB_ID": {
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 7,
"description": "Selected MPW design identifier.",
"reset": "0x1",
"expression": "reviewed field"
},
{
"name": "Reserved",
"lsb": 8,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0x0",
"expression": "reserved"
}
],
"description": "Selected MPW design identifier.",
"access": "RO",
"reset": "1"
},
"main.USER_IP_APB_DIV": {
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 7,
"description": "Clock-divider terminal count.",
"reset": "0x0",
"expression": "reviewed field"
},
{
"name": "Reserved",
"lsb": 8,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0x0",
"expression": "reserved"
}
],
"description": "Clock-divider terminal count.",
"access": "RW",
"reset": "0"
},
"main.USER_IP_APB_CNT": {
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 15,
"description": "Current counter value; a write preloads bits 15:0.",
"reset": "0x0",
"expression": "reviewed field"
},
{
"name": "Reserved",
"lsb": 16,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0x0",
"expression": "reserved"
}
],
"description": "Live 16-bit counter. A write preloads the current count; terminal 0xFFFF returns to zero and toggles the user output.",
"access": "RW",
"reset": "0"
}
},
"mpw-gpio": {
"main.USER_IP_APB_ID": {
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 7,
"description": "Selected MPW design identifier.",
"reset": "0x2",
"expression": "reviewed field"
},
{
"name": "Reserved",
"lsb": 8,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0x0",
"expression": "reserved"
}
],
"description": "Selected MPW design identifier.",
"access": "RO",
"reset": "2"
},
"main.USER_IP_APB_OE": {
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "Per-pin output enable.",
"reset": "0x0",
"expression": "reviewed field"
}
],
"description": "Per-pin output enable.",
"access": "RW",
"reset": "0"
},
"main.USER_IP_APB_DO": {
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "Per-pin output data.",
"reset": "0x0",
"expression": "reviewed field"
}
],
"description": "Per-pin output data.",
"access": "RW",
"reset": "0"
},
"main.USER_IP_APB_DI": {
"fields": [
{
"name": "VALUE",
"lsb": 0,
"msb": 31,
"description": "Current user-GPIO input data.",
"reset": "Dynamic",
"expression": "reviewed field"
}
],
"description": "Current user-GPIO input data.",
"access": "RO",
"reset": "Dynamic",
"notes": "This word reads the user-GPIO input boundary directly. Its value depends on the root input path and external pins; the demo IP does not reset or latch it."
}
},
"spisd": {
"main.DMA_CTRL": {
"fields": [
{
"name": "START",
"lsb": 0,
"msb": 0,
"description": "Write one to request start.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "ABORT",
"lsb": 1,
"msb": 1,
"description": "Write one to request abort.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 2,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"access": "WO",
"reset": "Not retained"
},
"main.IRQ_TEST": {
"fields": [
{
"name": "CMD_DONE",
"lsb": 0,
"msb": 0,
"description": "Write one to request cmd done.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "DATA_DONE",
"lsb": 1,
"msb": 1,
"description": "Write one to request data done.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "DMA_DONE",
"lsb": 2,
"msb": 2,
"description": "Write one to request dma done.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "CMD_ERROR",
"lsb": 3,
"msb": 3,
"description": "Write one to request cmd error.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "DATA_ERROR",
"lsb": 4,
"msb": 4,
"description": "Write one to request data error.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "DMA_ERROR",
"lsb": 5,
"msb": 5,
"description": "Write one to request dma error.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "ABORT",
"lsb": 6,
"msb": 6,
"description": "Write one to request abort.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 7,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"access": "WO",
"reset": "Not retained"
},
"main.CMD_START": {
"fields": [
{
"name": "START",
"lsb": 0,
"msb": 0,
"description": "Write one to submit the prepared card command.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 1,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"access": "WO",
"reset": "Not retained"
},
"main.IP_ID": {
"access": "RO"
},
"main.IP_VERSION": {
"access": "RO"
},
"main.CAPABILITY": {
"access": "RO"
},
"main.HOST_CTRL": {
"access": "RW",
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "HOST_ENABLE",
"description": "Host enable.",
"reset": "0x0",
"expression": "s_host_ctrl_q[`APB4_SPISD__HOST_CTRL_ENABLE]"
},
{
"lsb": 1,
"msb": 1,
"name": "ABORT",
"description": "Abort.",
"reset": "0x0",
"expression": "`APB4_SPISD__HOST_CTRL_ABORT"
},
{
"lsb": 2,
"msb": 2,
"name": "IRQ",
"description": "Irq.",
"reset": "0x0",
"expression": "`APB4_SPISD__HOST_CTRL_IRQ"
},
{
"lsb": 3,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0x0",
"expression": "s_host_ctrl_q"
}
]
},
"main.CLOCK_CTRL": {
"access": "RW",
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "CLOCK_ENABLE",
"description": "Clock enable.",
"reset": "0x0",
"expression": "s_clock_ctrl_q[`APB4_SPISD__CLOCK_CTRL_ENABLE]"
},
{
"lsb": 1,
"msb": 1,
"name": "TRAIN",
"description": "Train.",
"reset": "0x0",
"expression": "`APB4_SPISD__CLOCK_CTRL_TRAIN"
},
{
"lsb": 2,
"msb": 7,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0x0",
"expression": "s_clock_ctrl_q"
},
{
"lsb": 8,
"msb": 23,
"name": "HALF_PERIOD",
"description": "Half period.",
"reset": "0x5a",
"expression": "s_clock_ctrl_q[23:8]"
},
{
"lsb": 24,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0x0",
"expression": "s_clock_ctrl_q"
}
]
},
"main.CLOCK_ACTUAL": {
"access": "RO"
},
"main.TIMEOUT_CMD": {
"access": "RW"
},
"main.TIMEOUT_DATA": {
"access": "RW"
},
"main.TIMEOUT_BUSY": {
"access": "RW"
},
"main.STATUS": {
"access": "RO"
},
"main.CMD_ARG": {
"access": "RW"
},
"main.CMD_CFG": {
"access": "RW",
"fields": [
{
"lsb": 0,
"msb": 5,
"name": "CMD_INDEX",
"description": "Cmd index.",
"reset": "0x0",
"expression": "s_cmd_cfg_q[5:0]"
},
{
"lsb": 6,
"msb": 7,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0x0",
"expression": "s_cmd_cfg_q"
},
{
"lsb": 8,
"msb": 11,
"name": "RESP",
"description": "Resp.",
"reset": "0x0",
"expression": "`APB4_SPISD__CMD_CFG_RESP_LSB"
},
{
"lsb": 12,
"msb": 12,
"name": "CMD_STUFF_BYTE",
"description": "Cmd stuff byte.",
"reset": "0x0",
"expression": "s_cmd_cfg_q[`APB4_SPISD__CMD_CFG_STUFF_BYTE]"
},
{
"lsb": 13,
"msb": 13,
"name": "CMD_DATA_PRESENT",
"description": "Cmd data present.",
"reset": "0x0",
"expression": "s_cmd_cfg_q[`APB4_SPISD__CMD_CFG_DATA_PRESENT]"
},
{
"lsb": 14,
"msb": 14,
"name": "CMD_AUTO_STOP",
"description": "Cmd auto stop.",
"reset": "0x0",
"expression": "s_cmd_cfg_q[`APB4_SPISD__CMD_CFG_AUTO_STOP]"
},
{
"lsb": 15,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0x0",
"expression": "s_cmd_cfg_q"
}
]
},
"main.CMD_STATUS": {
"access": "RO"
},
"main.RESP0": {
"access": "RO"
},
"main.RESP1": {
"access": "RO"
},
"main.BLOCK_SIZE": {
"access": "RW"
},
"main.BLOCK_COUNT": {
"access": "RW"
},
"main.DATA_CFG": {
"access": "RW",
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "DATA_DIRECTION",
"description": "Data direction.",
"reset": "0x0",
"expression": "s_data_cfg_q[`APB4_SPISD__DATA_CFG_DIRECTION]"
},
{
"lsb": 1,
"msb": 3,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0x0",
"expression": "s_data_cfg_q"
},
{
"lsb": 4,
"msb": 4,
"name": "DATA_DMA_ENABLE",
"description": "Data dma enable.",
"reset": "0x0",
"expression": "s_data_cfg_q[`APB4_SPISD__DATA_CFG_DMA]"
},
{
"lsb": 5,
"msb": 5,
"name": "DATA_MULTI_BLOCK",
"description": "Data multi block.",
"reset": "0x0",
"expression": "s_data_cfg_q[`APB4_SPISD__DATA_CFG_MULTI_BLOCK]"
},
{
"lsb": 6,
"msb": 6,
"name": "DATA_CRC_CHECK",
"description": "Data crc check.",
"reset": "0x1",
"expression": "s_data_cfg_q[`APB4_SPISD__DATA_CFG_CRC_CHECK]"
},
{
"lsb": 7,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0x0",
"expression": "s_data_cfg_q"
}
]
},
"main.PIO_DATA": {
"access": "RW / FIFO port"
},
"main.DATA_STATUS": {
"access": "RO"
},
"main.FIFO_STATUS": {
"access": "RO"
},
"main.DESC_BASE": {
"access": "RW"
},
"main.DESC_COUNT": {
"access": "RW"
},
"main.DMA_STATUS": {
"access": "RO"
},
"main.CURRENT_DESC": {
"access": "RO"
},
"main.BYTES_DONE": {
"access": "RO"
},
"main.DMA_ERROR_ADDR": {
"access": "RO"
},
"main.DMA_ERROR": {
"access": "RO"
},
"main.IRQ_STATUS": {
"access": "RW1C"
},
"main.IRQ_ENABLE": {
"access": "RW"
},
"main.ERROR_STATUS": {
"access": "RW1C"
},
"main.LAST_CMD": {
"access": "RO"
},
"main.CRC_ERROR_COUNT": {
"access": "RO"
},
"main.TIMEOUT_COUNT": {
"access": "RO"
},
"main.AXI_ERROR_COUNT": {
"access": "RO"
},
"main.STALL_COUNT": {
"access": "RO"
}
},
"sdio": {
"main.IRQ_TEST": {
"fields": [
{
"name": "CMD_DONE",
"lsb": 0,
"msb": 0,
"description": "Write one to request cmd done.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "DATA_DONE",
"lsb": 1,
"msb": 1,
"description": "Write one to request data done.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "DMA_DONE",
"lsb": 2,
"msb": 2,
"description": "Write one to request dma done.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "CMD_ERROR",
"lsb": 3,
"msb": 3,
"description": "Write one to request cmd error.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "DATA_ERROR",
"lsb": 4,
"msb": 4,
"description": "Write one to request data error.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "DMA_ERROR",
"lsb": 5,
"msb": 5,
"description": "Write one to request dma error.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "DAT1",
"lsb": 6,
"msb": 6,
"description": "Write one to request dat1.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "ABORT",
"lsb": 7,
"msb": 7,
"description": "Write one to request abort.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 8,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"access": "WO",
"reset": "Not retained",
"description": "Irq test. The field descriptions and operation sequence define its use."
},
"main.CMD_START": {
"fields": [
{
"name": "START",
"lsb": 0,
"msb": 0,
"description": "Write one to submit the prepared card command.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 1,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"access": "WO",
"reset": "Not retained",
"description": "Cmd start. The field descriptions and operation sequence define its use."
},
"main.IP_ID": {
"description": "Read-only component identification value.",
"access": "RO"
},
"main.IP_VERSION": {
"description": "Read-only register interface version.",
"access": "RO"
},
"main.CAPABILITY": {
"description": "Implemented capability and resource geometry; field values follow this RTL snapshot.",
"access": "RO"
},
"main.HOST_CTRL": {
"description": "Host ctrl. The field descriptions and operation sequence define its use.",
"access": "RW"
},
"main.CLOCK_CTRL": {
"description": "Clock ctrl. The field descriptions and operation sequence define its use.",
"access": "RW"
},
"main.CLOCK_ACTUAL": {
"description": "Clock actual. The field descriptions and operation sequence define its use.",
"access": "RO"
},
"main.BUS_CTRL": {
"description": "Bus ctrl. The field descriptions and operation sequence define its use.",
"access": "RW"
},
"main.TIMEOUT_CMD": {
"description": "Timeout cmd. The field descriptions and operation sequence define its use.",
"access": "RW"
},
"main.TIMEOUT_DATA": {
"description": "Timeout data. The field descriptions and operation sequence define its use.",
"access": "RW"
},
"main.TIMEOUT_BUSY": {
"description": "Timeout busy. The field descriptions and operation sequence define its use.",
"access": "RW"
},
"main.STATUS": {
"description": "Current status; see the field definitions and functional sequence.",
"access": "RO"
},
"main.PRESENT": {
"description": "Present. The field descriptions and operation sequence define its use.",
"access": "RW"
},
"main.CMD_ARG": {
"description": "Cmd arg. The field descriptions and operation sequence define its use.",
"access": "RW"
},
"main.CMD_CFG": {
"description": "Cmd cfg. The field descriptions and operation sequence define its use.",
"access": "RW"
},
"main.CMD_STATUS": {
"description": "Current cmd status; see the field definitions and functional sequence.",
"access": "RO"
},
"main.RESP0": {
"description": "Captured command-response word resp0. Response ordering follows the card protocol.",
"access": "RO"
},
"main.RESP1": {
"description": "Captured command-response word resp1. Response ordering follows the card protocol.",
"access": "RO"
},
"main.RESP2": {
"description": "Captured command-response word resp2. Response ordering follows the card protocol.",
"access": "RO"
},
"main.RESP3": {
"description": "Captured command-response word resp3. Response ordering follows the card protocol.",
"access": "RO"
},
"main.RESP4": {
"description": "Captured command-response word resp4. Response ordering follows the card protocol.",
"access": "RO"
},
"main.BLOCK_SIZE": {
"description": "Block size. The field descriptions and operation sequence define its use.",
"access": "RW"
},
"main.BLOCK_COUNT": {
"description": "Block count. The field descriptions and operation sequence define its use.",
"access": "RW"
},
"main.DATA_CFG": {
"description": "Data cfg. The field descriptions and operation sequence define its use.",
"access": "RW"
},
"main.DATA_START": {
"description": "Data start. The field descriptions and operation sequence define its use.",
"access": "RO status / WO start",
"notes": "Read returns data-engine status. A byte-strobed write with only bit 0 set submits the prepared data operation; the controller must not be busy."
},
"main.PIO_DATA": {
"description": "Pio data. The field descriptions and operation sequence define its use.",
"access": "RW / FIFO port"
},
"main.FIFO_STATUS": {
"description": "Current fifo status; see the field definitions and functional sequence.",
"access": "RO"
},
"main.FIFO_WATERMARK": {
"description": "Fifo watermark. The field descriptions and operation sequence define its use.",
"access": "RO"
},
"main.DESC_BASE": {
"description": "Desc base. The field descriptions and operation sequence define its use.",
"access": "RW"
},
"main.DESC_COUNT": {
"description": "Desc count. The field descriptions and operation sequence define its use.",
"access": "RW"
},
"main.DMA_CTRL": {
"description": "Dma ctrl. The field descriptions and operation sequence define its use.",
"access": "WO"
},
"main.DMA_STATUS": {
"description": "Current dma status; see the field definitions and functional sequence.",
"access": "RO"
},
"main.CURRENT_DESC": {
"description": "Current desc. The field descriptions and operation sequence define its use.",
"access": "RO"
},
"main.BYTES_DONE": {
"description": "Bytes done. The field descriptions and operation sequence define its use.",
"access": "RO"
},
"main.DMA_ERROR_ADDR": {
"description": "Dma error addr. The field descriptions and operation sequence define its use.",
"access": "RO"
},
"main.DMA_ERROR": {
"description": "Dma error. The field descriptions and operation sequence define its use.",
"access": "RO"
},
"main.IRQ_STATUS": {
"description": "Current irq status; see the field definitions and functional sequence.",
"access": "RW1C"
},
"main.IRQ_ENABLE": {
"description": "Irq enable. The field descriptions and operation sequence define its use.",
"access": "RW"
},
"main.ERROR_STATUS": {
"description": "Current error status; see the field definitions and functional sequence.",
"access": "RW1C"
},
"main.LAST_CMD": {
"description": "Last cmd. The field descriptions and operation sequence define its use.",
"access": "RO"
},
"main.CRC_ERROR_COUNT": {
"description": "Crc error count. The field descriptions and operation sequence define its use.",
"access": "RO"
},
"main.TIMEOUT_COUNT": {
"description": "Timeout count. The field descriptions and operation sequence define its use.",
"access": "RO"
},
"main.AXI_ERROR_COUNT": {
"description": "Axi error count. The field descriptions and operation sequence define its use.",
"access": "RO"
},
"main.STALL_COUNT": {
"description": "Stall count. The field descriptions and operation sequence define its use.",
"access": "RO"
},
"main.DEBUG": {
"description": "Debug. The field descriptions and operation sequence define its use.",
"access": "RO"
}
},
"resource": {
"resource.Owner": {
"fields": [
{
"name": "OWNER",
"lsb": 0,
"msb": 1,
"description": "0 = LP, 1 = HP; other values invalid.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 2,
"msb": 7,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
},
{
"name": "LOCK",
"lsb": 8,
"msb": 8,
"description": "Write-once owner lock; cleared by reset.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 9,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"access": "RW",
"reset": "0",
"description": "Per-resource owner."
},
"resource.Control": {
"fields": [
{
"name": "QUIESCE",
"lsb": 0,
"msb": 0,
"description": "Block new resource work and request drain.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "RESET",
"lsb": 1,
"msb": 1,
"description": "Hold the resource in reset.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 2,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"access": "RW",
"reset": "0",
"description": "Per-resource control."
},
"resource.Status": {
"fields": [
{
"name": "OWNER",
"lsb": 0,
"msb": 1,
"description": "Current LP/HP owner.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "QUIESCE",
"lsb": 2,
"msb": 2,
"description": "Quiesce state.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "RESET",
"lsb": 3,
"msb": 3,
"description": "Reset state.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "IDLE",
"lsb": 4,
"msb": 4,
"description": "Resource idle input.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "FAULT",
"lsb": 5,
"msb": 5,
"description": "Sticky ownership/lifecycle fault.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "IRQ",
"lsb": 6,
"msb": 6,
"description": "Current resource interrupt input.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "BLOCK_ACK",
"lsb": 7,
"msb": 7,
"description": "Admission-block acknowledgement.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 8,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"access": "RO",
"reset": "0",
"description": "Per-resource status."
},
"resource.Fault": {
"fields": [
{
"name": "FAULT",
"lsb": 0,
"msb": 0,
"description": "Sticky fault; write one to clear.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 1,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"access": "RW1C",
"reset": "0",
"description": "Per-resource fault."
},
"resource.HandoffCount": {
"fields": [
{
"name": "COUNT",
"lsb": 0,
"msb": 15,
"description": "Saturating count of accepted owner changes.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 16,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"access": "RO",
"reset": "0",
"description": "Per-resource handoffcount."
}
},
"xpi": {
"main.ID": {
"access": "RO"
},
"main.VERSION": {
"access": "RO"
},
"main.CAPABILITY": {
"access": "RO"
},
"main.CTRL": {
"access": "RW",
"reset": "1",
"description": "Global controller enable. Configure protected slot/LUT state only in the allowed idle/disabled state.",
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "ENABLE",
"description": "Enable the XPI controller.",
"reset": "1",
"expression": "XPI_CTRL_ENABLE"
},
{
"lsb": 1,
"msb": 31,
"name": "Reserved",
"description": "Reserved; write zero.",
"reset": "0",
"expression": "reserved"
}
]
},
"main.STATUS": {
"access": "RO"
},
"main.COMMAND": {
"access": "WO",
"fields": [
{
"name": "INDIRECT_START",
"lsb": 0,
"msb": 0,
"description": "Start the configured indirect sequence.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "POLL_START",
"lsb": 1,
"msb": 1,
"description": "Start automatic status polling.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "ABORT",
"lsb": 2,
"msb": 2,
"description": "Abort the current command and release chip select safely.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 3,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"reset": "Not retained"
},
"main.ERROR_STATE": {
"access": "RW1C",
"fields": [
{
"name": "CODE",
"lsb": 0,
"msb": 3,
"description": "First XPI error code.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 4,
"msb": 30,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
},
{
"name": "VALID",
"lsb": 31,
"msb": 31,
"description": "Sticky first-error valid; write one to clear the snapshot.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
}
],
"reset": "0"
},
"main.ERROR_ADDR": {
"access": "RO"
},
"main.ERROR_INFO": {
"access": "RO",
"fields": [
{
"name": "CODE",
"lsb": 0,
"msb": 3,
"description": "Captured error code.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "SLOT",
"lsb": 4,
"msb": 5,
"description": "Captured chip-select slot.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "PC",
"lsb": 6,
"msb": 8,
"description": "Captured LUT program counter.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 9,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"reset": "0"
},
"main.INTR_STATE": {
"access": "RW1C"
},
"main.INTR_ENABLE": {
"access": "RW"
},
"main.INTR_STATUS": {
"access": "RO"
},
"main.INTR_TEST": {
"access": "WO",
"fields": [
{
"name": "INDIRECT_DONE",
"lsb": 0,
"msb": 0,
"description": "Write one to inject indirect done.",
"reset": "Not retained",
"expression": "XPI_INTR_INDIRECT_DONE"
},
{
"name": "POLL_MATCH",
"lsb": 1,
"msb": 1,
"description": "Write one to inject poll match.",
"reset": "Not retained",
"expression": "XPI_INTR_POLL_MATCH"
},
{
"name": "TX_WATERMARK",
"lsb": 2,
"msb": 2,
"description": "Write one to inject tx watermark.",
"reset": "Not retained",
"expression": "XPI_INTR_TX_WATERMARK"
},
{
"name": "RX_WATERMARK",
"lsb": 3,
"msb": 3,
"description": "Write one to inject rx watermark.",
"reset": "Not retained",
"expression": "XPI_INTR_RX_WATERMARK"
},
{
"name": "AXI_ERROR",
"lsb": 4,
"msb": 4,
"description": "Write one to inject axi error.",
"reset": "Not retained",
"expression": "XPI_INTR_AXI_ERROR"
},
{
"name": "SEQUENCE_ERROR",
"lsb": 5,
"msb": 5,
"description": "Write one to inject sequence error.",
"reset": "Not retained",
"expression": "XPI_INTR_SEQUENCE_ERROR"
},
{
"name": "TIMEOUT",
"lsb": 6,
"msb": 6,
"description": "Write one to inject timeout.",
"reset": "Not retained",
"expression": "XPI_INTR_TIMEOUT"
},
{
"name": "ABORT_DONE",
"lsb": 7,
"msb": 7,
"description": "Write one to inject abort done.",
"reset": "Not retained",
"expression": "XPI_INTR_ABORT_DONE"
},
{
"name": "Reserved",
"lsb": 8,
"msb": 31,
"description": "Reserved; write zero.",
"reset": "0",
"expression": "reserved"
}
],
"reset": "Not retained"
},
"main.DMA_CTRL": {
"access": "RW",
"fields": [
{
"name": "TX_ENABLE",
"lsb": 0,
"msb": 0,
"description": "Enable TX DMA request pacing.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "RX_ENABLE",
"lsb": 1,
"msb": 1,
"description": "Enable RX DMA request pacing.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 2,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"reset": "0"
},
"main.FIFO_CTRL": {
"access": "RW",
"reset": "0x00001010",
"fields": [
{
"name": "TX_WATERMARK",
"lsb": 0,
"msb": 7,
"description": "TX low-watermark threshold.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "RX_WATERMARK",
"lsb": 8,
"msb": 15,
"description": "RX high-watermark threshold.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "TX_FLUSH",
"lsb": 16,
"msb": 16,
"description": "Write-one TX FIFO flush pulse; reads as zero.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "RX_FLUSH",
"lsb": 17,
"msb": 17,
"description": "Write-one RX FIFO flush pulse; reads as zero.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 18,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
]
},
"main.FIFO_STATUS": {
"access": "RO"
},
"main.TXDATA": {
"access": "WO",
"fields": [
{
"name": "DATA",
"lsb": 0,
"msb": 31,
"description": "Word pushed into the transmit FIFO using the documented PIO packing.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
}
],
"reset": "Not retained"
},
"main.RXDATA": {
"access": "RO / pop"
},
"main.INDIRECT_ADDR": {
"access": "RW"
},
"main.INDIRECT_COUNT": {
"access": "RW"
},
"main.INDIRECT_CFG": {
"access": "RW",
"fields": [
{
"lsb": 0,
"msb": 1,
"name": "INDIRECT_SLOT",
"description": "Indirect slot.",
"reset": "0x0",
"expression": "s_indirect_cfg_q[1:0]"
},
{
"lsb": 2,
"msb": 3,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0x0",
"expression": "s_indirect_cfg_q"
},
{
"lsb": 4,
"msb": 7,
"name": "INDIRECT_SEQ",
"description": "Indirect seq.",
"reset": "0x0",
"expression": "s_indirect_cfg_q[7:4]"
},
{
"lsb": 8,
"msb": 31,
"name": "Reserved",
"description": "Reads zero.",
"reset": "0x0",
"expression": "24'd0"
}
]
},
"main.POLL_CFG": {
"access": "RW",
"fields": [
{
"lsb": 0,
"msb": 1,
"name": "POLL_SLOT",
"description": "Poll slot.",
"reset": "0x0",
"expression": "s_poll_cfg_q[1:0]"
},
{
"lsb": 2,
"msb": 3,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0x0",
"expression": "s_poll_cfg_q"
},
{
"lsb": 4,
"msb": 7,
"name": "POLL_SEQ",
"description": "Poll seq.",
"reset": "0x0",
"expression": "s_poll_cfg_q[7:4]"
},
{
"lsb": 8,
"msb": 31,
"name": "Reserved",
"description": "Reads zero.",
"reset": "0x0",
"expression": "24'd0"
}
]
},
"main.POLL_MASK": {
"access": "RW"
},
"main.POLL_MATCH": {
"access": "RW"
},
"main.POLL_INTERVAL": {
"access": "RW"
},
"main.POLL_TIMEOUT": {
"access": "RW"
},
"main.PERF_CTRL": {
"access": "RW"
},
"main.PERF_AXI_READ_BYTES": {
"access": "RO"
},
"main.PERF_AXI_WRITE_BYTES": {
"access": "RO"
},
"main.PERF_PHY_BYTES": {
"access": "RO"
},
"main.PERF_COMMANDS": {
"access": "RO"
},
"main.PERF_STALL_CYCLES": {
"access": "RO"
},
"main.CONFIG_LOCK": {
"access": "RW",
"fields": [
{
"name": "GLOBAL",
"lsb": 0,
"msb": 0,
"description": "Lock global configuration until reset.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "SLOTS",
"lsb": 1,
"msb": 4,
"description": "Lock slots 0 through 3 respectively.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "LUT",
"lsb": 5,
"msb": 5,
"description": "Lock LUT contents until reset.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 6,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"reset": "0"
},
"slot.CTRL": {
"access": "RW",
"fields": [
{
"name": "ENABLE",
"lsb": 0,
"msb": 0,
"description": "Enable this chip-select slot.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "MEMORY_ENABLE",
"lsb": 1,
"msb": 1,
"description": "Permit mapped reads through this slot.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "WRITE_ENABLE",
"lsb": 2,
"msb": 2,
"description": "Permit mapped writes at the controller frontend; product data-plane policy still applies.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "CPOL",
"lsb": 3,
"msb": 3,
"description": "Select SPI mode 3 when set; mode 0 when clear.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 4,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0",
"expression": "reserved"
}
],
"reset": "slot 0: 0x3; slots 1-3: 0",
"description": "Per-chip-select ctrl."
},
"slot.DEVICE_SIZE": {
"access": "RW",
"fields": [
{
"name": "BYTES",
"lsb": 0,
"msb": 31,
"description": "Device/addressable span for this slot.",
"reset": "Register reset applies",
"expression": "reviewed semantic field"
}
],
"reset": "slot 0: 0x01000000; slots 1-3: 0x04000000",
"description": "Per-chip-select device size."
},
"slot.SEQ_CFG": {
"access": "RW",
"fields": [
{
"name": "READ_SEQUENCE",
"lsb": 0,
"msb": 3,
"description": "Mapped-read LUT sequence index.",
"reset": "0x0",
"expression": "reviewed semantic field"
},
{
"name": "WRITE_SEQUENCE",
"lsb": 4,
"msb": 7,
"description": "Mapped-write LUT sequence index.",
"reset": "0x0",
"expression": "reviewed semantic field"
},
{
"name": "Reserved",
"lsb": 8,
"msb": 31,
"description": "Reserved; preserve zero when writing.",
"reset": "0x0",
"expression": "reserved"
}
],
"reset": "0",
"description": "Per-chip-select seq cfg."
},
"slot.TIMING": {
"access": "RW",
"fields": [
{
"name": "CLK_DIV",
"lsb": 0,
"msb": 7,
"description": "Serial clock divider field.",
"reset": "0x0",
"expression": "reviewed semantic field"
},
{
"name": "CS_SETUP",
"lsb": 8,
"msb": 15,
"description": "Chip-select setup interval.",
"reset": "0x0",
"expression": "reviewed semantic field"
},
{
"name": "CS_HOLD",
"lsb": 16,
"msb": 23,
"description": "Chip-select hold interval.",
"reset": "0x0",
"expression": "reviewed semantic field"
},
{
"name": "CS_HIGH",
"lsb": 24,
"msb": 31,
"description": "Minimum deselected interval.",
"reset": "0x2",
"expression": "reviewed semantic field"
}
],
"reset": "0x02000000",
"description": "Per-chip-select timing."
},
"slot.TIMEOUT": {
"access": "RW",
"fields": [
{
"name": "CYCLES",
"lsb": 0,
"msb": 31,
"description": "Nonzero operation timeout budget.",
"reset": "0x10000",
"expression": "reviewed semantic field"
}
],
"reset": "0x00010000",
"description": "Per-chip-select timeout."
},
"slot.BOUNDARY": {
"access": "RW",
"fields": [
{
"name": "BYTES",
"lsb": 0,
"msb": 31,
"description": "Zero disables device-boundary splitting; otherwise a power of two from 4 bytes to 64 MiB.",
"reset": "0x0",
"expression": "reviewed semantic field"
}
],
"reset": "0",
"description": "Per-chip-select boundary."
}
},
"usb2": {
"main.IP_ID": {
"access": "RO"
},
"main.IP_VERSION": {
"access": "RO"
},
"main.CAPABILITY0": {
"access": "RO"
},
"main.CAPABILITY1": {
"access": "RO"
},
"main.GLOBAL_CTRL": {
"access": "RW"
},
"main.GLOBAL_STATUS": {
"access": "RO",
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "ENABLE",
"description": "Controller enable.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 1,
"msb": 1,
"name": "BUSY",
"description": "Scheduler, DMA or transaction engine is busy.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 2,
"msb": 3,
"name": "ROLE",
"description": "0: idle; 1: device; 2: host. Encoding 3 is unused.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 4,
"msb": 4,
"name": "LINK_READY",
"description": "Synchronized PHY link-ready indication.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 5,
"msb": 5,
"name": "DMA_BUSY",
"description": "Descriptor DMA is busy.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 6,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/usb/apb4_usb2.sv"
}
],
"review_source": "rtl/ip/usb/apb4_usb2.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06."
},
"main.ROLE_CTRL": {
"access": "RW"
},
"main.ROLE_STATUS": {
"access": "RO",
"fields": [
{
"lsb": 0,
"msb": 1,
"name": "ROLE",
"description": "0: idle; 1: device; 2: host.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 2,
"msb": 2,
"name": "PENDING",
"description": "Role switch is pending.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 3,
"msb": 3,
"name": "ID_GROUND",
"description": "Synchronized PHY ID-ground indication.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 4,
"msb": 5,
"name": "VBUS_STATE",
"description": "Synchronized two-bit ULPI VBUS state.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 6,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/usb/apb4_usb2.sv"
}
],
"review_source": "rtl/ip/usb/apb4_usb2.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06."
},
"main.PHY_CTRL": {
"access": "RW"
},
"main.PHY_STATUS": {
"access": "RO",
"fields": [
{
"lsb": 0,
"msb": 1,
"name": "LINE_STATE",
"description": "Synchronized ULPI line-state code.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 2,
"msb": 3,
"name": "VBUS_STATE",
"description": "Synchronized ULPI VBUS state.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 4,
"msb": 4,
"name": "ID_GROUND",
"description": "Synchronized ID-ground input.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 5,
"msb": 5,
"name": "LINK_READY",
"description": "PHY link-ready indication.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 6,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/usb/apb4_usb2.sv"
}
],
"review_source": "rtl/ip/usb/apb4_usb2.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06."
},
"main.ULPI_VIEWPORT": {
"access": "RW"
},
"main.ULPI_VIEWPORT_DATA": {
"access": "RO"
},
"main.TIMEOUT": {
"access": "RW"
},
"main.FRAME": {
"access": "RO",
"description": "Frame. The field descriptions and operation sequence define its use."
},
"main.TEST_CTRL": {
"access": "RW",
"fields": [
{
"lsb": 0,
"msb": 7,
"name": "TEST_CTRL",
"description": "Test ctrl.",
"reset": "0x0",
"expression": "s_test_ctrl_q[7:0]"
},
{
"lsb": 8,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0x0",
"expression": "s_test_ctrl_q"
}
]
},
"main.PIO_DATA": {
"access": "Unsupported",
"description": "Unimplemented PIO aperture. Access returns PSLVERR; payload transfers use the descriptor DMA path."
},
"main.IRQ_STATUS": {
"access": "RW1C"
},
"main.IRQ_ENABLE": {
"access": "RW"
},
"main.IRQ_TEST": {
"access": "RW"
},
"main.ERROR_STATUS": {
"access": "RW1C"
},
"main.ERROR_CODE": {
"access": "RO"
},
"main.ERROR_INFO": {
"access": "RO"
},
"main.ERROR_DESC_ADDR": {
"access": "RO"
},
"main.ERROR_BUFFER_ADDR": {
"access": "RO"
},
"main.PERF_TX_BYTES": {
"access": "RO"
},
"main.PERF_RX_BYTES": {
"access": "RO"
},
"main.PERF_PACKETS": {
"access": "RO"
},
"main.PERF_RETRIES": {
"access": "RO"
},
"main.PERF_AXI_STALL": {
"access": "RO"
},
"main.PERF_RAM_STALL": {
"access": "RO"
},
"main.PERF_IRQ_COUNT": {
"access": "RO"
},
"main.PERF_CTRL": {
"access": "RW"
},
"main.DEVICE_CTRL": {
"access": "RW",
"fields": [
{
"lsb": 0,
"msb": 15,
"name": "DEVICE_CTRL",
"description": "Device ctrl.",
"reset": "0x0",
"expression": "s_device_ctrl_q[15:0]"
},
{
"lsb": 16,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0x0",
"expression": "s_device_ctrl_q"
}
]
},
"main.DEVICE_ADDR": {
"access": "RW"
},
"main.DEVICE_STATUS": {
"access": "RO",
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "DEVICE_ACTIVE",
"description": "Current role is device.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 1,
"msb": 1,
"name": "SUSPEND",
"description": "PHY suspend request.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 2,
"msb": 2,
"name": "REMOTE_WAKE",
"description": "Remote-wake request.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 3,
"msb": 15,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 16,
"msb": 31,
"name": "CONTROL_ECHO",
"description": "Echoes the stored DEVICE_CTRL word; it does not certify USB protocol completion.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
}
],
"review_source": "rtl/ip/usb/apb4_usb2.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06."
},
"main.SETUP0": {
"access": "RO"
},
"main.SETUP1": {
"access": "RO"
},
"main.ENDPOINT_PENDING_IN": {
"access": "RO"
},
"main.ENDPOINT_PENDING_OUT": {
"access": "RO"
},
"main.ENDPOINT_COMPLETE_IN": {
"access": "RW1C"
},
"main.ENDPOINT_COMPLETE_OUT": {
"access": "RW1C"
},
"main.HOST_CTRL": {
"access": "RW",
"fields": [
{
"lsb": 0,
"msb": 15,
"name": "HOST_CTRL",
"description": "Host ctrl.",
"reset": "0x0",
"expression": "s_host_ctrl_q[15:0]"
},
{
"lsb": 16,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0x0",
"expression": "s_host_ctrl_q"
}
]
},
"main.HOST_STATUS": {
"access": "RO",
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "HOST_ACTIVE",
"description": "Current role is host.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 1,
"msb": 1,
"name": "TRANSACTION_BUSY",
"description": "Transaction engine is busy.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 2,
"msb": 15,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 16,
"msb": 31,
"name": "CONTROL_ECHO",
"description": "Echoes the stored HOST_CTRL word.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
}
],
"review_source": "rtl/ip/usb/apb4_usb2.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06."
},
"main.PORT_CTRL": {
"access": "RW",
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "PORT_CTRL",
"description": "Port ctrl.",
"reset": "0x0",
"expression": "s_port_ctrl_q[0]"
},
{
"lsb": 1,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0x0",
"expression": "s_port_ctrl_q"
}
]
},
"main.PORT_STATUS": {
"access": "RO",
"fields": [
{
"lsb": 0,
"msb": 1,
"name": "LINE_STATE",
"description": "Synchronized ULPI line-state code.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 2,
"msb": 3,
"name": "VBUS_STATE",
"description": "Synchronized ULPI VBUS state.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 4,
"msb": 4,
"name": "ID_GROUND",
"description": "Synchronized ID-ground input.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 5,
"msb": 5,
"name": "LINK_READY",
"description": "PHY link-ready indication.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 6,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/usb/apb4_usb2.sv"
}
],
"review_source": "rtl/ip/usb/apb4_usb2.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06."
},
"main.SCHEDULE_CTRL": {
"access": "RW",
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "SCHEDULE_CTRL",
"description": "Schedule ctrl.",
"reset": "0x0",
"expression": "s_schedule_ctrl_q[0]"
},
{
"lsb": 1,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0x0",
"expression": "s_schedule_ctrl_q"
}
]
},
"main.SCHEDULE_STATUS": {
"access": "RO",
"fields": [
{
"lsb": 0,
"msb": 13,
"name": "FRAME",
"description": "Synchronized frame/microframe counter.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 14,
"msb": 30,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 31,
"msb": 31,
"name": "ENABLE",
"description": "Stored schedule enable.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
}
],
"review_source": "rtl/ip/usb/apb4_usb2.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06."
},
"main.RAM_CTRL": {
"access": "RW",
"fields": [
{
"lsb": 0,
"msb": 15,
"name": "RAM_CTRL",
"description": "Ram ctrl.",
"reset": "0x0",
"expression": "s_ram_ctrl_q[15:0]"
},
{
"lsb": 16,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0x0",
"expression": "s_ram_ctrl_q"
}
]
},
"main.RAM_STATUS": {
"access": "RO",
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "BUSY",
"description": "Transaction engine currently uses packet RAM.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 1,
"msb": 29,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 30,
"msb": 30,
"name": "FIXED_MARKER",
"description": "Fixed implementation marker, reads one.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 31,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/usb/apb4_usb2.sv"
}
],
"review_source": "rtl/ip/usb/apb4_usb2.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06."
},
"main.ECC_STATUS": {
"access": "RO",
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "CORRECTED",
"description": "Corrected packet-RAM event pulse.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 1,
"msb": 1,
"name": "UNCORRECTABLE",
"description": "Uncorrectable packet-RAM event pulse.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 2,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/usb/apb4_usb2.sv"
}
],
"review_source": "rtl/ip/usb/apb4_usb2.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06."
},
"main.ECC_CORRECTED_COUNT": {
"access": "RO"
},
"main.ECC_UNCORRECTABLE_COUNT": {
"access": "RO"
},
"main.RAM_BIST": {
"access": "RW"
},
"main.DEBUG_STATUS": {
"access": "RO",
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "SCHEDULER_BUSY",
"description": "Scheduler busy.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 1,
"msb": 1,
"name": "DMA_BUSY",
"description": "Descriptor DMA busy.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 2,
"msb": 2,
"name": "TRANSACTION_BUSY",
"description": "USB transaction engine busy.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 3,
"msb": 3,
"name": "ROLE_RESET",
"description": "Role-change reset active.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 4,
"msb": 4,
"name": "DESCRIPTOR_IRQ",
"description": "Descriptor interrupt pulse.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 5,
"msb": 5,
"name": "ABORT_DONE",
"description": "DMA abort completion pulse.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 6,
"msb": 6,
"name": "BIST_REQUEST",
"description": "Reserved BIST request observation.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 7,
"msb": 7,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 8,
"msb": 15,
"name": "TEST_CTRL",
"description": "Stored TEST_CTRL byte.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
},
{
"lsb": 16,
"msb": 31,
"name": "RAM_CTRL",
"description": "Stored RAM_CTRL word.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/apb4_usb2.sv"
}
],
"review_source": "rtl/ip/usb/apb4_usb2.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06."
},
"endpoint.CFG": {
"access": "RW",
"description": "Cfg. The field descriptions and operation sequence define its use."
},
"endpoint.RAM_IN": {
"access": "RW",
"description": "Ram in. The field descriptions and operation sequence define its use.",
"fields": [
{
"lsb": 0,
"msb": 1,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
},
{
"lsb": 2,
"msb": 13,
"name": "BASE",
"description": "12-bit packet-RAM base slice carried into the hardware work descriptor.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
},
{
"lsb": 14,
"msb": 15,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
},
{
"lsb": 16,
"msb": 30,
"name": "LENGTH",
"description": "Configured region length in bytes; software validates the end against RAM capacity.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
},
{
"lsb": 31,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
}
],
"review_source": "rtl/ip/usb/usb2_scheduler.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06.",
"reset": "0"
},
"endpoint.RAM_OUT": {
"access": "RW",
"description": "Ram out. The field descriptions and operation sequence define its use.",
"fields": [
{
"lsb": 0,
"msb": 1,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
},
{
"lsb": 2,
"msb": 13,
"name": "BASE",
"description": "12-bit packet-RAM base slice carried into the hardware work descriptor.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
},
{
"lsb": 14,
"msb": 15,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
},
{
"lsb": 16,
"msb": 30,
"name": "LENGTH",
"description": "Configured region length in bytes; software validates the end against RAM capacity.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
},
{
"lsb": 31,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
}
],
"review_source": "rtl/ip/usb/usb2_scheduler.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06.",
"reset": "0"
},
"endpoint.DESC_IN": {
"access": "RW",
"description": "Desc in. The field descriptions and operation sequence define its use."
},
"endpoint.DESC_OUT": {
"access": "RW",
"description": "Desc out. The field descriptions and operation sequence define its use."
},
"endpoint.COMMAND": {
"access": "RW",
"description": "Command. The field descriptions and operation sequence define its use."
},
"endpoint.STATUS": {
"access": "RO",
"description": "Current status; see the field definitions and functional sequence.",
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "ACTIVE",
"description": "Command has been accepted; cleared when completion is published.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
},
{
"lsb": 1,
"msb": 1,
"name": "DONE",
"description": "Completion has been published.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
},
{
"lsb": 2,
"msb": 2,
"name": "FAULT",
"description": "The completed operation failed.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
},
{
"lsb": 3,
"msb": 3,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
},
{
"lsb": 4,
"msb": 7,
"name": "RESULT",
"description": "0: success; 1: NAK; 2: STALL; 3: timeout; 4: CRC; 5: protocol; 6: overflow; 7: canceled. On a scheduler fault, the low fault-code nibble is reported.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
},
{
"lsb": 8,
"msb": 8,
"name": "IN_TOGGLE",
"description": "IN completion toggle observation; RESET_TOGGLE clears it.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
},
{
"lsb": 9,
"msb": 9,
"name": "OUT_TOGGLE",
"description": "OUT completion toggle observation; RESET_TOGGLE clears it.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
},
{
"lsb": 10,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
}
],
"review_source": "rtl/ip/usb/usb2_scheduler.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06.",
"reset": "0"
},
"endpoint.BYTES_IN": {
"access": "RO",
"description": "Bytes in. The field descriptions and operation sequence define its use."
},
"endpoint.BYTES_OUT": {
"access": "RO",
"description": "Bytes out. The field descriptions and operation sequence define its use."
},
"channel.CFG": {
"access": "RW",
"description": "Cfg. The field descriptions and operation sequence define its use."
},
"channel.TARGET": {
"access": "RW",
"description": "Target. The field descriptions and operation sequence define its use."
},
"channel.INTERVAL": {
"access": "RW",
"description": "Interval. The field descriptions and operation sequence define its use."
},
"channel.RAM": {
"access": "RW",
"description": "Ram. The field descriptions and operation sequence define its use.",
"fields": [
{
"lsb": 0,
"msb": 1,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
},
{
"lsb": 2,
"msb": 13,
"name": "BASE",
"description": "12-bit packet-RAM base slice carried into the hardware work descriptor.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
},
{
"lsb": 14,
"msb": 15,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
},
{
"lsb": 16,
"msb": 30,
"name": "LENGTH",
"description": "Configured region length in bytes; software validates the end against RAM capacity.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
},
{
"lsb": 31,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
}
],
"review_source": "rtl/ip/usb/usb2_scheduler.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06.",
"reset": "0"
},
"channel.DESC": {
"access": "RW",
"description": "Desc. The field descriptions and operation sequence define its use."
},
"channel.COMMAND": {
"access": "RW",
"description": "Command. The field descriptions and operation sequence define its use."
},
"channel.STATUS": {
"access": "RO",
"description": "Current status; see the field definitions and functional sequence.",
"fields": [
{
"lsb": 0,
"msb": 0,
"name": "ACTIVE",
"description": "Command has been accepted; cleared when completion is published.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
},
{
"lsb": 1,
"msb": 1,
"name": "DONE",
"description": "Completion has been published.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
},
{
"lsb": 2,
"msb": 2,
"name": "FAULT",
"description": "The completed operation failed.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
},
{
"lsb": 3,
"msb": 3,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
},
{
"lsb": 4,
"msb": 7,
"name": "RESULT",
"description": "0: success; 1: NAK; 2: STALL; 3: timeout; 4: CRC; 5: protocol; 6: overflow; 7: canceled. On a scheduler fault, the low fault-code nibble is reported.",
"reset": "Register reset applies",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
},
{
"lsb": 8,
"msb": 31,
"name": "Reserved",
"description": "No defined software function. Preserve zero when writing.",
"reset": "0",
"expression": "rtl/ip/usb/usb2_scheduler.sv"
}
],
"review_source": "rtl/ip/usb/usb2_scheduler.sv",
"review_notes": "Reviewed against the pinned implementation: explicit slices, write masks and consumer use; 2026-09-06.",
"reset": "0"
},
"channel.BYTES": {
"access": "RO",
"description": "Bytes. The field descriptions and operation sequence define its use."
}
}
}
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