mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-04 22:32:36 +00:00
maksyuki
9c706ba0ff
- Updated paths in test files to reflect new directory structure for RTL and script files. - Changed references from rtl/mini to rtl/ip and scripts/rtl where applicable. - Added a new test file for Tiny product isolation, ensuring independent ABI and bus acceptance. - Enhanced tests for memory map generation and protocol contracts for Tiny architecture. - Ensured that all tests are aligned with the latest directory structure and naming conventions.
267 lines
10 KiB
Python
267 lines
10 KiB
Python
"""Differential tests for the committed APU-P7 frontend profile-1 BAM."""
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from __future__ import annotations
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import os
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import re
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import shutil
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import struct
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import subprocess
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import sys
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from fractions import Fraction
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from pathlib import Path
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ROOT = Path(__file__).resolve().parents[1]
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sys.path.insert(0, str(ROOT / "scripts"))
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import apu_kws_frontend as bam # noqa: E402
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import generate_apu_kws_rtl_constants as gen # noqa: E402
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from apu_kws_convert import import_tflite # noqa: E402
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from run_apu_p7_kws_rtl import ( # noqa: E402
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PCM_SOURCES,
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TFLITE,
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_load_manifest,
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_padded_pcm,
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_write_hex,
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)
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KWS01 = ROOT / ".cache/retrosoc/sources/apu-kws-mfcc/datasets/kws01"
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ROM = ROOT / "rtl/ip/multimedia/apu_kws_rom.svh"
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DUMP_TB = ROOT / "tests/rtl/apu_p7_frontend_dump_tb.sv"
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OFFICIAL_SUBSET = (0, 1, 97, 194, 291, 388, 485, 563, 582, 679, 776, 873, 970)
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MFCC_PATTERN = re.compile(r"^MFCC_HEX (\d+) ([0-9a-f]{980})$")
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PEAK_PATTERN = re.compile(r"^PEAK (\d+) (\d+)$")
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COMPLETE_PATTERN = re.compile(r"^APU_P7_FRONTEND_DUMP_COMPLETE windows=(\d+) first=(\d+)$")
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_ROM_SIGNED = re.compile(r"\s*\d+'d(\d+):\s*(\w+)\s*=\s*(-)?\d+'sd(\d+);")
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_ROM_UNSIGNED = re.compile(r"\s*\d+'d(\d+):\s*(\w+)\s*=\s*\d+'d(\d+);")
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_ROM_LN2 = re.compile(r"ApuKwsLn2Q24\s*=\s*32'sd(\d+);")
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def _signed8(value: int) -> int:
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return value - 256 if value >= 128 else value
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def _rom_tables() -> tuple[dict[str, list[int]], int]:
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tables: dict[str, dict[int, int]] = {}
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ln2: int | None = None
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for line in ROM.read_text(encoding="ascii").splitlines():
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match = _ROM_SIGNED.match(line)
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if match:
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index, name, sign, value = match.groups()
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tables.setdefault(name, {})[int(index)] = -int(value) if sign else int(value)
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continue
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match = _ROM_UNSIGNED.match(line)
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if match:
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index, name, value = match.groups()
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tables.setdefault(name, {})[int(index)] = int(value)
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continue
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match = _ROM_LN2.search(line)
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if match:
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ln2 = int(match.group(1))
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assert ln2 is not None
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return {name: [words[i] for i in sorted(words)] for name, words in tables.items()}, ln2
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def test_apu_p7_frontend_bam_constants_match_rom() -> None:
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"""BAM tables equal the generator outputs and the ROM words the RTL consumes."""
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tables, ln2 = _rom_tables()
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twiddle_real, twiddle_imag = bam.twiddle_q30()
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generator_twiddle_real, generator_twiddle_imag = gen._twiddle()
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assert bam.hann_q30() == tuple(gen._hann())
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assert twiddle_real == tuple(generator_twiddle_real)
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assert twiddle_imag == tuple(generator_twiddle_imag)
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assert bam.mel_q30() == tuple(gen._mel_weights())
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assert bam.dct_q30() == tuple(gen._dct())
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assert bam.log_q24() == tuple(gen._log_rom())
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assert list(bam.hann_q30()) == tables["apu_kws_hann_q30"]
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assert list(twiddle_real) == tables["apu_kws_twiddle_real_q30"]
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assert list(twiddle_imag) == tables["apu_kws_twiddle_imag_q30"]
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assert list(bam.mel_q30()) == tables["apu_kws_mel_q30"]
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assert list(bam.dct_q30()) == tables["apu_kws_dct_q30"]
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assert list(bam.log_q24()) == tables["apu_kws_log_q24"]
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assert bam.ln2_q24() == ln2
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scale = struct.unpack("<f", struct.pack("<I", bam.QUANT_SCALE_BITS))[0]
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assert Fraction(scale) * (1 << 24) == bam.QUANT_DIVISOR
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assert bam.QUANT_DIVISOR == 0x0095AF17
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assert bam.QUANT_BIAS * bam.QUANT_DIVISOR == 0x3087C475
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def test_apu_p7_frontend_bam_vs_official_features() -> None:
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"""BAM tracks the official corpus within +-1 LSB, wrap bytes byte-exact."""
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if not PCM_SOURCES.is_dir() or not KWS01.is_dir():
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return
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records = _load_manifest()
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for index in OFFICIAL_SUBSET:
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official_path = KWS01 / records[index]["bin_name"]
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if not official_path.is_file():
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return
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for index in OFFICIAL_SUBSET:
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stages = bam.frontend_stages(bam.samples_from_pcm(_padded_pcm(records[index])))
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official = (KWS01 / records[index]["bin_name"]).read_bytes()
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assert len(official) == bam.FEATURE_BYTES
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assert len(stages.features) == bam.FEATURE_BYTES
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differing = [
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(position, actual, expected)
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for position, (actual, expected) in enumerate(zip(stages.features, official))
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if actual != expected
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]
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for position, actual, expected in differing:
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assert abs(_signed8(actual) - _signed8(expected)) <= 1, (
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f"tst index {index} byte {position}: BAM {_signed8(actual)} vs "
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f"official {_signed8(expected)} exceeds +-1 LSB"
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)
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if index == 563:
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quantized = [value for row in stages.quantized for value in row]
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wraps = [
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position
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for position, value in enumerate(quantized)
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if value < -128 or value > 127
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]
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assert len(wraps) == 15, f"tst_000563 wrap positions {wraps}"
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assert all(stages.features[position] == official[position] for position in wraps)
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def _compile_dump_tb(build_dir: Path) -> dict[str, Path | None]:
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common = ROOT / "rtl/managed/clusterip/common/rtl"
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multimedia = ROOT / "rtl/ip/multimedia"
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filelist = build_dir / "apu_p7_frontend_dump.fl"
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filelist.write_text(
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"\n".join(
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[
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"+define+SV_ASSRT_DISABLE",
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f"+incdir+{common}",
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f"+incdir+{common / 'interface'}",
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f"+incdir+{multimedia}",
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str(common / "interface/axi4_stream_if.sv"),
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str(multimedia / "apu_kws_sram_client.sv"),
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str(multimedia / "apu_kws_coeff_store.sv"),
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str(multimedia / "apu_kws_engine.sv"),
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str(ROOT / "tests/rtl/apu_kws_coeff_fixture.sv"),
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str(DUMP_TB),
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"",
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]
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),
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encoding="utf-8",
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)
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converted = build_dir / "apu_p7_frontend_dump.v"
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subprocess.run(
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[
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sys.executable,
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str(ROOT / "scripts/rtl/convt_sv2v.py"),
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"-f",
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str(filelist),
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"--output",
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str(converted),
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],
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check=True,
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)
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simv = build_dir / "apu_p7_frontend_dump_simv"
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subprocess.run(
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["iverilog", "-g2012", "-s", "apu_p7_frontend_dump_tb", "-o", str(simv), str(converted)],
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check=True,
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)
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verilator_binary: Path | None = None
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if shutil.which("verilator") is not None:
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verilator_dir = build_dir / "verilator"
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ccache_dir = build_dir / "ccache"
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ccache_dir.mkdir(exist_ok=True)
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environment = {
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**os.environ,
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"CCACHE_DIR": str(ccache_dir),
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"CCACHE_TEMPDIR": str(ccache_dir),
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}
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subprocess.run(
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[
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"verilator",
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"--binary",
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"--timing",
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"-O3",
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"-Wno-fatal",
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"--top-module",
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"apu_p7_frontend_dump_tb",
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"--Mdir",
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str(verilator_dir),
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str(converted),
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],
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check=True,
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capture_output=True,
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text=True,
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env=environment,
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)
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verilator_binary = verilator_dir / "Vapu_p7_frontend_dump_tb"
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return {"icarus": simv, "verilator": verilator_binary}
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def test_apu_p7_frontend_rtl_differential(tmp_path: Path) -> None:
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"""RTL frontend MFCC bytes are bit-exact against the committed BAM."""
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if any(shutil.which(tool) is None for tool in ("iverilog", "vvp", "sv2v")):
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return
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if not PCM_SOURCES.is_dir() or not TFLITE.is_file():
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return
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verilator = shutil.which("verilator")
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# Icarus needs ~7 minutes per window on this engine; keep one window there.
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spans = [(0, 2), (563, 1)] if verilator is not None else [(563, 1)]
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indices = [index for first, count in spans for index in range(first, first + count)]
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records = _load_manifest()
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pcm_dir = tmp_path / "pcm"
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windows: dict[int, bytes] = {}
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for index in indices:
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padded = _padded_pcm(records[index])
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windows[index] = padded
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_write_hex(pcm_dir / f"pcm_{index:06d}.hex", padded)
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apum_hex = tmp_path / "kws_apum.hex"
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image = import_tflite(TFLITE)
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_write_hex(apum_hex, image)
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apuc_hex = tmp_path / "kws_apuc.hex"
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apuc, _manifest = gen.build_apuc(image)
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_write_hex(apuc_hex, apuc)
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binaries = _compile_dump_tb(tmp_path)
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dumps: dict[int, tuple[bytes, int]] = {}
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for first, count in spans:
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plusargs = [
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f"+APUM_HEX={apum_hex}",
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f"+APUC_HEX={apuc_hex}",
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f"+PCM_DIR={pcm_dir}",
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f"+WINDOW_COUNT={count}",
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f"+FIRST_INDEX={first}",
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"+MAX_WINDOW_CYCLES=4000000",
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]
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command = (
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[str(binaries["verilator"]), *plusargs]
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if verilator is not None
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else ["vvp", str(binaries["icarus"]), *plusargs]
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)
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result = subprocess.run(command, check=True, capture_output=True, text=True, timeout=3600)
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features: dict[int, bytes] = {}
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peaks: dict[int, int] = {}
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completed = 0
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for line in result.stdout.splitlines():
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mfcc_match = MFCC_PATTERN.match(line)
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if mfcc_match:
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features[int(mfcc_match.group(1))] = bytes.fromhex(mfcc_match.group(2))
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continue
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peak_match = PEAK_PATTERN.match(line)
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if peak_match:
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peaks[int(peak_match.group(1))] = int(peak_match.group(2))
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continue
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complete_match = COMPLETE_PATTERN.match(line)
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if complete_match:
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assert int(complete_match.group(1)) == count
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assert int(complete_match.group(2)) == first
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completed += 1
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assert completed == 1, f"dump simulator output lacks the completion marker:\n{result.stdout}"
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for index in range(first, first + count):
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assert index in features and index in peaks, f"window {index} dump missing"
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dumps[index] = (features[index], peaks[index])
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assert sorted(dumps) == indices
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for index in indices:
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stages = bam.frontend_stages(bam.samples_from_pcm(windows[index]))
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rtl_features, rtl_peak = dumps[index]
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assert stages.peak == rtl_peak, (
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f"window {index} peak: BAM {stages.peak} != RTL {rtl_peak}"
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)
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assert stages.features == rtl_features, (
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f"window {index}: RTL frontend MFCC bytes are not bit-exact against the BAM"
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)
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