mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-04 22:32:36 +00:00
maksyuki
3cf9e4c6a6
- Modified dma_core to accommodate a wider data width for FIFO operations. - Updated filelists to include new DVP source files and formal verification files. - Introduced formal verification modules for DVP functionality. - Enhanced clock and reset domain configurations for DVP integration. - Added DVP interrupt handling in the IRQ topology. - Implemented a testbench for DVP to validate register access and frame processing. - Updated software build scripts to include DVP-related source files. - Adjusted the system topology to reflect the new DVP interrupt and IRQ mapping.
228 lines
6.2 KiB
JSON
228 lines
6.2 KiB
JSON
{
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"schema_version": 2,
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"reset_ports": ["ext_rst_n_i_pad"],
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"domains": [
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{
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"name": "external",
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"clock": "s_ext_clk_buf",
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"reset": "s_ext_rst_n_sync",
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"reset_source": "ext_rst_n_i",
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"reset_primitive": "rst_sync",
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"path": "rtl/mini/top/rcu.sv",
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"instance": "u_ext_rst_sync",
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"sta": {
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"source_port": "extclk_i_pad",
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"pin": "u_rcu.u_ext_clk_buf/clk_o",
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"period_ns": 13.888888889,
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"async_group": "external"
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}
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},
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{
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"name": "system",
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"clock": "sys_clk_o",
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"reset": "s_sys_rst_n_sync",
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"reset_source": "s_sys_reset_source_n",
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"reset_primitive": "rst_sync",
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"path": "rtl/mini/top/rcu.sv",
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"instance": "u_sys_rst_sync",
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"sta": {
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"source_domain": "external",
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"pin": "u_rcu.u_sys_clk_buf/clk_o",
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"period_ns": 13.888888889,
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"async_group": "external"
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}
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},
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{
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"name": "audio",
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"clock": "s_aud_clk_buf",
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"reset": "s_aud_rst_n_sync",
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"reset_source": "ext_rst_n_i",
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"reset_primitive": "rst_sync",
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"path": "rtl/mini/top/rcu.sv",
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"instance": "u_aud_rst_sync",
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"sta": {
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"source_port": "audclk_i_pad",
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"pin": "u_rcu.u_aud_clk_buf/clk_o",
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"period_ns": 54.253472222,
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"async_group": "audio"
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}
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},
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{
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"name": "jtag",
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"clock": "s_jtag_tck_buf",
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"reset": "s_jtag_trst_n_sync",
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"reset_source": "jtag_trst_n_i",
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"reset_primitive": "rst_sync",
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"path": "rtl/mini/top/mgmt_debug_wrapper.sv",
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"instance": "u_jtag_rst_sync",
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"sta": {
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"source_port": "jtag_tck_i_pad",
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"object_type": "port",
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"period_ns": 100.0,
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"async_group": "jtag"
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}
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},
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{
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"name": "dvp",
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"clock": "s_pclk_sel",
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"reset": "s_dvp_pclk_rst_n_sync",
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"reset_source": "rst_n_i",
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"reset_primitive": "rst_sync",
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"path": "rtl/ip/ribp/multimedia/dvp.sv",
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"instance": "u_dvp_pclk_rst_sync",
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"sta": {
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"source_port": "gpio_10_io_pad",
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"pin": "u_retrosoc.u_ip_ribp_wrapper.u_rib_dvp.u_dvp_pclk_clk_buf/clk_o",
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"period_ns": 41.666666667,
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"async_group": "dvp"
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}
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}
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],
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"crossings": [
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{
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"name": "pll_request",
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"source": "system",
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"destination": "external",
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"primitive": "cdc_2phase",
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"path": "rtl/mini/top/rcu.sv",
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"instance": "u_pll_request_cdc"
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},
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{
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"name": "pll_response",
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"source": "external",
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"destination": "system",
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"primitive": "cdc_2phase",
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"path": "rtl/mini/top/rcu.sv",
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"instance": "u_pll_response_cdc"
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},
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{
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"name": "clint_timebase",
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"source": "external",
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"destination": "system",
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"primitive": "edge_det",
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"path": "rtl/ip/ribp/peripheral/clint_timebase.sv",
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"instance": "u_tick_edge_det"
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},
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{
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"name": "dvp_enable",
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"source": "system",
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"destination": "dvp",
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"primitive": "cdc_2phase",
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"path": "rtl/ip/ribp/multimedia/dvp.sv",
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"instance": "u_dvp_config_cdc"
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},
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{
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"name": "dvp_fifo",
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"source": "dvp",
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"destination": "system",
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"primitive": "cdc_fifo_warm_flush",
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"path": "rtl/ip/ribp/multimedia/dvp.sv",
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"instance": "u_dvp_payload_fifo"
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},
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{
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"name": "rtc_command",
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"source": "system",
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"destination": "audio",
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"primitive": "async_reqack",
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"path": "rtl/managed/clusterip/rtc/rtl/apb4_rtc.sv",
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"instance": "u_command_mailbox"
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},
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{
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"name": "rtc_response",
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"source": "audio",
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"destination": "system",
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"primitive": "async_reqack",
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"path": "rtl/managed/clusterip/rtc/rtl/apb4_rtc.sv",
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"instance": "u_response_mailbox"
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},
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{
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"name": "rtc_event",
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"source": "audio",
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"destination": "system",
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"primitive": "cdc_sync",
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"path": "rtl/managed/clusterip/rtc/rtl/apb4_rtc.sv",
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"instance": "u_event_sync"
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},
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{
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"name": "rtc_status",
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"source": "audio",
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"destination": "system",
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"primitive": "cdc_sync",
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"path": "rtl/managed/clusterip/rtc/rtl/apb4_rtc.sv",
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"instance": "u_status_sync"
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},
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{
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"name": "rtc_interrupt_enable",
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"source": "audio",
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"destination": "system",
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"primitive": "cdc_sync",
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"path": "rtl/managed/clusterip/rtc/rtl/apb4_rtc.sv",
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"instance": "u_interrupt_enable_sync"
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},
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{
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"name": "rtc_wake_enable",
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"source": "audio",
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"destination": "system",
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"primitive": "cdc_sync",
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"path": "rtl/managed/clusterip/rtc/rtl/apb4_rtc.sv",
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"instance": "u_wake_enable_sync"
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},
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{
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"name": "rtc_wake_status",
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"source": "audio",
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"destination": "system",
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"primitive": "cdc_sync",
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"path": "rtl/ip/ribp/peripheral/sysctrl.sv",
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"instance": "u_rtc_wake_sync"
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},
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{
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"name": "jtag_dmi",
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"source": "jtag",
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"destination": "system",
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"primitive": "hazard3_apb_async_bridge",
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"path": "rtl/managed/hazard3/hdl/debug/dtm/hazard3_jtag_dtm_core.v",
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"instance": "inst_hazard3_apb_async_bridge"
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},
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{
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"name": "wdg_command",
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"source": "system",
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"destination": "audio",
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"primitive": "async_reqack",
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"path": "rtl/managed/clusterip/wdg/rtl/apb4_wdg.sv",
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"instance": "u_command_mailbox"
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},
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{
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"name": "wdg_response",
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"source": "audio",
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"destination": "system",
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"primitive": "async_reqack",
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"path": "rtl/managed/clusterip/wdg/rtl/apb4_wdg.sv",
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"instance": "u_response_mailbox"
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},
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{
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"name": "wdg_debug_halted",
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"source": "system",
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"destination": "audio",
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"primitive": "cdc_sync",
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"path": "rtl/managed/clusterip/wdg/rtl/apb4_wdg.sv",
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"instance": "u_debug_halted_sync"
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},
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{
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"name": "wdg_status",
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"source": "audio",
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"destination": "system",
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"primitive": "cdc_sync",
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"path": "rtl/managed/clusterip/wdg/rtl/apb4_wdg.sv",
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"instance": "u_status_sync"
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},
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{
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"name": "wdg_reset_cause",
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"source": "audio",
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"destination": "system",
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"primitive": "cdc_sync",
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"path": "rtl/managed/clusterip/wdg/rtl/apb4_wdg.sv",
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"instance": "u_reset_cause_sync"
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}
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]
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}
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