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retroSoC/rtl/mini/address_map/memory_map.json
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maksyuki f94cf5e7e2 feat: add NPU register tests for RTL and SDK synchronization 
- Introduced  to ensure consistency between RTL and C register definitions.
- Implemented exhaustive checks for offsets, scalar encodings, bit shifts, and enumerations.
- Added  for shell and control-CDC unit tests using Icarus and Verilator.
- Created test cases for NPU register and control CDC functionality, verifying successful simulation outputs.
2026-09-18 20:47:18 +08:00

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{
"schema_version": 2,
"cpu_reset": "0x00000000",
"sysctrl_registers": [
{
"symbol": "CORESEL",
"offset": "0x00"
},
{
"symbol": "IPSEL",
"offset": "0x04"
},
{
"symbol": "PLL_CFG",
"offset": "0x08"
},
{
"symbol": "PLL_CMD",
"offset": "0x0C"
},
{
"symbol": "FAULT_STATUS",
"offset": "0x10"
},
{
"symbol": "FAULT_ADDR",
"offset": "0x14"
},
{
"symbol": "FAULT_COUNT",
"offset": "0x18"
},
{
"symbol": "PLL_STATUS",
"offset": "0x1C"
},
{
"symbol": "USER_CORE_RESET",
"offset": "0x20"
},
{
"symbol": "USER_CORE_STATUS",
"offset": "0x24"
},
{
"symbol": "FAULT_MASTER",
"offset": "0x28"
},
{
"symbol": "FAULT_DETAIL",
"offset": "0x2C"
},
{
"symbol": "PERF_CTRL",
"offset": "0x40"
},
{
"symbol": "PERF_MGMT_WAIT_LO",
"offset": "0x44"
},
{
"symbol": "PERF_MGMT_WAIT_HI",
"offset": "0x48"
},
{
"symbol": "PERF_USER_WAIT_LO",
"offset": "0x4C"
},
{
"symbol": "PERF_USER_WAIT_HI",
"offset": "0x50"
},
{
"symbol": "PERF_DMA_WAIT_LO",
"offset": "0x54"
},
{
"symbol": "PERF_DMA_WAIT_HI",
"offset": "0x58"
},
{
"symbol": "PERF_APB4_PERIPH_WAIT_LO",
"offset": "0x5C"
},
{
"symbol": "PERF_APB4_PERIPH_WAIT_HI",
"offset": "0x60"
},
{
"symbol": "PERF_APB4_SYSTEM_WAIT_LO",
"offset": "0x64"
},
{
"symbol": "PERF_APB4_SYSTEM_WAIT_HI",
"offset": "0x68"
},
{
"symbol": "PERF_SDRAM_WAIT_LO",
"offset": "0x6C"
},
{
"symbol": "PERF_SDRAM_WAIT_HI",
"offset": "0x70"
},
{
"symbol": "PERF_PSRAM_WAIT_LO",
"offset": "0x74"
},
{
"symbol": "PERF_PSRAM_WAIT_HI",
"offset": "0x78"
},
{
"symbol": "PERF_FLASH_WAIT_LO",
"offset": "0x7C"
},
{
"symbol": "PERF_FLASH_WAIT_HI",
"offset": "0x80"
},
{
"symbol": "TEST_STATUS",
"offset": "0x84"
},
{
"symbol": "RTC_WAKE_STATUS",
"offset": "0x88"
},
{
"symbol": "PERF_SDIO0_WAIT_LO",
"offset": "0x8C"
},
{
"symbol": "PERF_SDIO0_WAIT_HI",
"offset": "0x90"
},
{
"symbol": "PERF_SDIO1_WAIT_LO",
"offset": "0x94"
},
{
"symbol": "PERF_SDIO1_WAIT_HI",
"offset": "0x98"
},
{
"symbol": "PERF_USB2_WAIT_LO",
"offset": "0x9C"
},
{
"symbol": "PERF_USB2_WAIT_HI",
"offset": "0xA0"
},
{
"symbol": "HP_CTRL",
"offset": "0xA4"
},
{
"symbol": "HP_STATUS",
"offset": "0xA8"
},
{
"symbol": "DEBUG_SELECT",
"offset": "0xAC"
},
{
"symbol": "CLK_HP_REQ",
"offset": "0xB0"
},
{
"symbol": "CLK_HP_CURRENT",
"offset": "0xB4"
},
{
"symbol": "CLK_LP_CFG",
"offset": "0xB8"
},
{
"symbol": "CLK_PCLK_CFG",
"offset": "0xBC"
},
{
"symbol": "CLK_STATUS",
"offset": "0xC0"
},
{
"symbol": "CLK_FAULT",
"offset": "0xC4"
},
{
"symbol": "CLK_TIMEOUT",
"offset": "0xC8"
},
{
"symbol": "CLK_GATE",
"offset": "0xCC"
},
{
"symbol": "MEM_PAD_CTRL",
"offset": "0xD0"
},
{
"symbol": "MEM_PAD_STATUS",
"offset": "0xD4"
},
{
"symbol": "MEM_PAD_FAULT",
"offset": "0xD8"
}
],
"regions": [
{
"symbol": "FLASH",
"base": "0x00000000",
"size": "0x01000000",
"route": "axi4",
"kind": "active",
"public": true,
"linker": "FLASH",
"user_access": "ro",
"burst": "incr16"
},
{
"symbol": "HP_ACLINT",
"base": "0x02000000",
"size": "0x00010000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "rw"
},
{
"symbol": "HP_PLIC",
"base": "0x0C000000",
"size": "0x04000000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "rw"
},
{
"symbol": "APB4_GPIO",
"base": "0x10000000",
"size": "0x00001000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "rw"
},
{
"symbol": "APB4_UART0",
"base": "0x10001000",
"size": "0x00001000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "rw"
},
{
"symbol": "APB4_TIM0",
"base": "0x10002000",
"size": "0x00001000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "rw"
},
{
"symbol": "APB4_TIM1",
"base": "0x10003000",
"size": "0x00001000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "rw"
},
{
"symbol": "APB4_PSRAM",
"base": "0x10004000",
"size": "0x00001000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "none"
},
{
"symbol": "APB4_SPISD",
"base": "0x10005000",
"size": "0x00001000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "none"
},
{
"symbol": "APB4_I2C0",
"base": "0x10006000",
"size": "0x00001000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "rw"
},
{
"symbol": "APB4_I2S",
"base": "0x10007000",
"size": "0x00001000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "rw"
},
{
"symbol": "APB4_WS2812",
"base": "0x10008000",
"size": "0x00001000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "rw"
},
{
"symbol": "APB4_XPI",
"base": "0x10009000",
"size": "0x00001000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "none"
},
{
"symbol": "APB4_DMA",
"base": "0x1000A000",
"size": "0x00001000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "none"
},
{
"symbol": "APB4_SYSCTRL",
"base": "0x1000B000",
"size": "0x00001000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "none"
},
{
"symbol": "APB4_CRYPTO",
"base": "0x1000C000",
"size": "0x00001000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "none"
},
{
"symbol": "APB4_CLINT",
"base": "0x10020000",
"size": "0x00010000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "none"
},
{
"symbol": "APB4_SDRAM",
"base": "0x1000D000",
"size": "0x00001000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "none"
},
{
"symbol": "APB4_DVP",
"base": "0x1000E000",
"size": "0x00001000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "rw"
},
{
"symbol": "APB4_SDIO0",
"base": "0x1000F000",
"size": "0x00001000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "none"
},
{
"symbol": "APB4_OPIPSRAM",
"base": "0x10010000",
"size": "0x00001000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "none"
},
{
"symbol": "APB4_I2C1",
"base": "0x10011000",
"size": "0x00001000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "rw"
},
{
"symbol": "APB4_GA2D",
"base": "0x10012000",
"size": "0x00001000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "none"
},
{
"symbol": "APB4_APU",
"base": "0x10013000",
"size": "0x00001000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "none"
},
{
"symbol": "APB4_GPIO_ADMIN",
"base": "0x10014000",
"size": "0x00001000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "none"
},
{
"symbol": "APB4_SDIO1",
"base": "0x10015000",
"size": "0x00001000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "none"
},
{
"symbol": "APB4_USB2",
"base": "0x10016000",
"size": "0x00001000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "none"
},
{
"symbol": "APB4_SRAM",
"base": "0x10017000",
"size": "0x00001000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "none"
},
{
"symbol": "APB4_UART1",
"base": "0x10018000",
"size": "0x00001000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "rw"
},
{
"symbol": "APB4_HP_MAILBOX",
"base": "0x10019000",
"size": "0x00001000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "rw"
},
{
"symbol": "APB4_ARCHINFO",
"base": "0x20000000",
"size": "0x00001000",
"route": "apb4_system",
"kind": "active",
"public": true,
"user_access": "ro"
},
{
"symbol": "APB4_RNG",
"base": "0x20001000",
"size": "0x00001000",
"route": "apb4_system",
"kind": "active",
"public": true,
"user_access": "none"
},
{
"symbol": "APB4_JPEG",
"base": "0x1001A000",
"size": "0x00001000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "none"
},
{
"symbol": "APB4_NPU",
"base": "0x1001B000",
"size": "0x00001000",
"route": "apb4_periph",
"kind": "active",
"public": true,
"user_access": "none"
},
{
"symbol": "APB4_PWM",
"base": "0x20002000",
"size": "0x00001000",
"route": "apb4_system",
"kind": "active",
"public": true,
"user_access": "rw"
},
{
"symbol": "APB4_PS2",
"base": "0x20003000",
"size": "0x00001000",
"route": "apb4_system",
"kind": "active",
"public": true,
"user_access": "rw"
},
{
"symbol": "APB4_RTC",
"base": "0x20004000",
"size": "0x00001000",
"route": "apb4_system",
"kind": "active",
"public": true,
"user_access": "rw"
},
{
"symbol": "APB4_WDG",
"base": "0x20005000",
"size": "0x00001000",
"route": "apb4_system",
"kind": "active",
"public": true,
"user_access": "none"
},
{
"symbol": "APB4_CRC",
"base": "0x20006000",
"size": "0x00001000",
"route": "apb4_system",
"kind": "active",
"public": true,
"user_access": "rw"
},
{
"symbol": "APB4_USER_IP",
"base": "0x20007000",
"size": "0x00001000",
"route": "apb4_system",
"kind": "active",
"public": true,
"user_access": "rw"
},
{
"symbol": "APB4_EXT_L",
"base": "0x20008000",
"size": "0x00001000",
"route": "apb4_system",
"kind": "active",
"public": true,
"user_access": "none"
},
{
"symbol": "APB4_EXT_H",
"base": "0x20009000",
"size": "0x00001000",
"route": "apb4_system",
"kind": "active",
"public": true,
"user_access": "none"
},
{
"symbol": "APB4_RESOURCE_CTRL",
"base": "0x2000A000",
"size": "0x00001000",
"route": "apb4_system",
"kind": "active",
"public": true,
"user_access": "none"
},
{
"symbol": "APB4_FABRIC_MONITOR",
"base": "0x2000B000",
"size": "0x00001000",
"route": "apb4_system",
"kind": "active",
"public": true,
"user_access": "none"
},
{
"symbol": "SRAM",
"base": "0x30000000",
"size": "0x00020000",
"size_options": [
"0x00001000",
"0x00004000",
"0x00008000",
"0x00010000",
"0x00020000"
],
"route": "ram",
"kind": "active",
"public": true,
"linker": "SRAM",
"user_access": "rw",
"burst": "incr16"
},
{
"symbol": "SDRAM",
"base": "0x38000000",
"size": "0x04000000",
"route": "axi4",
"kind": "active",
"public": true,
"linker": "SDRAM",
"user_access": "rw",
"burst": "incr16"
},
{
"symbol": "PSRAM",
"base": "0x40000000",
"size": "0x02000000",
"route": "axi4",
"kind": "active",
"public": true,
"linker": "PSRAM",
"user_access": "rw",
"burst": "incr16"
},
{
"symbol": "OPIPSRAM",
"base": "0x48000000",
"size": "0x08000000",
"route": "axi4",
"kind": "active",
"public": true,
"linker": "OPIPSRAM",
"user_access": "rw",
"burst": "incr16"
},
{
"symbol": "XPI",
"base": "0x50000000",
"size": "0x10000000",
"route": "axi4",
"kind": "active",
"public": true,
"user_access": "rw",
"burst": "incr16"
},
{
"symbol": "SPISD",
"base": "0x60000000",
"size": "0x40000000",
"route": "reserved",
"kind": "reserved",
"public": true,
"user_access": "none",
"burst": "incr1"
}
]
}
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