mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-04 22:32:36 +00:00
maksyuki
4b40dbf262
- Updated the formal file list generator to include CLINT source files. - Added CLINT timebase to the clock and reset domains configuration. - Enhanced the SOC topology generation to include CLINT interrupts and their mappings. - Introduced a new CLINT testbench to validate multi-hart and timebase functionality. - Modified the software build configuration to define CLINT timebase frequency. - Updated the RCU module to integrate CLINT timebase generation. - Adjusted the IRQ configuration to reflect changes in CLINT interrupt signals. - Added user-visible flags for interrupts in the topology configuration. - Enhanced the clock reset domain checks to include CLINT timebase. - Updated the memory map tests to validate CLINT peripheral integration.
14 lines
382 B
Makefile
14 lines
382 B
Makefile
SOC := MINI
|
|
PDK := IHP130
|
|
HAVE_PLL := NO
|
|
HAVE_SRAM_IF := YES
|
|
HAVE_SRAM_MACRO := YES
|
|
PDK_BEHAV := YES
|
|
HAVE_SVA := NO
|
|
EXT_CLK_HZ := 72000000
|
|
CLINT_TIMEBASE_HZ := 1000000
|
|
ISA := RV32IM
|
|
HAVE_CSR := YES
|
|
APP := coremark
|
|
COREMARK_MODE := standard
|
|
LINK_TYPE := ld2_all_sram
|