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https://github.com/retroSoC/retroSoC.git
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- Updated the formal file list generator to include CLINT source files. - Added CLINT timebase to the clock and reset domains configuration. - Enhanced the SOC topology generation to include CLINT interrupts and their mappings. - Introduced a new CLINT testbench to validate multi-hart and timebase functionality. - Modified the software build configuration to define CLINT timebase frequency. - Updated the RCU module to integrate CLINT timebase generation. - Adjusted the IRQ configuration to reflect changes in CLINT interrupt signals. - Added user-visible flags for interrupts in the topology configuration. - Enhanced the clock reset domain checks to include CLINT timebase. - Updated the memory map tests to validate CLINT peripheral integration.
12 lines
319 B
Makefile
12 lines
319 B
Makefile
SOC := MINI
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PDK := ICS55
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HAVE_PLL := NO
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HAVE_SRAM_IF := NO
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HAVE_SRAM_MACRO := NO
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HAVE_SVA := NO
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EXT_CLK_HZ := 72000000
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CLINT_TIMEBASE_HZ := 1000000
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ISA := RV32IM
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HAVE_CSR := NO
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APP := bringup
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LINK_TYPE := ld2_psram
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