mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-04 22:32:36 +00:00
maksyuki
9c706ba0ff
- Updated paths in test files to reflect new directory structure for RTL and script files. - Changed references from rtl/mini to rtl/ip and scripts/rtl where applicable. - Added a new test file for Tiny product isolation, ensuring independent ABI and bus acceptance. - Enhanced tests for memory map generation and protocol contracts for Tiny architecture. - Ensured that all tests are aligned with the latest directory structure and naming conventions.
68 lines
2.4 KiB
Python
68 lines
2.4 KiB
Python
"""APB4 I2S register, CDC, clocking, and interrupt regression."""
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from __future__ import annotations
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import shutil
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import subprocess
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import sys
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from pathlib import Path
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ROOT = Path(__file__).resolve().parents[1]
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def test_i2s_controller_abi_and_clocking(tmp_path: Path) -> None:
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iverilog = shutil.which("iverilog")
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vvp = shutil.which("vvp")
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if iverilog is None or vvp is None:
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return
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common = ROOT / "rtl/managed/clusterip/common/rtl"
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ip = ROOT / "rtl/ip/serial"
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defines = [
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"+define+PDK_BEHAV",
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"+define+SV_ASSRT_DISABLE",
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]
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source = [
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"+incdir+" + str(common),
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"+incdir+" + str(common / "interface"),
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"+incdir+" + str(common / "utils"),
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"+incdir+" + str(common / "cdc"),
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"+incdir+" + str(common / "clkrst"),
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"+incdir+" + str(ip),
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str(common / "interface/apb4_if.sv"),
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str(common / "interface/axi4_stream_if.sv"),
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str(common / "utils/register.sv"),
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str(common / "utils/xchecker.sv"),
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str(common / "utils/bin2gray.sv"),
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str(common / "utils/gray2bin.sv"),
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str(common / "utils/spill_register.sv"),
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str(common / "cdc/cdc_sync.sv"),
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str(common / "cdc/cdc_rst_ctrlr.sv"),
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str(common / "cdc/async_reqack.sv"),
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str(common / "cdc/cdc_fifo.sv"),
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str(common / "cdc/cdc_2phase.sv"),
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str(common / "cdc/cdc_warm_flush.sv"),
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str(common / "utils/edge_det.sv"),
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str(common / "clkrst/rst_sync.sv"),
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str(ROOT / "rtl/tech/tc_clk.sv"),
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str(ip / "i2s_pkg.sv"),
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str(ip / "i2s_reg.sv"),
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str(ip / "i2s_clkgen.sv"),
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str(ip / "i2s_recv.sv"),
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str(ip / "i2s_send.sv"),
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str(ip / "i2s_core.sv"),
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str(ip / "apb4_i2s.sv"),
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str(ROOT / "tests/rtl/i2s_tb.sv"),
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]
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source_list = tmp_path / "i2s.fl"
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source_list.write_text("\n".join([*defines, *source, ""]), encoding="utf-8")
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converted = tmp_path / "i2s.v"
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subprocess.run(
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[sys.executable, str(ROOT / "scripts/rtl/convt_sv2v.py"), "-f", str(source_list), "--output", str(converted)],
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check=True,
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)
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simulation = tmp_path / "i2s_tb"
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subprocess.run([iverilog, "-g2012", "-s", "i2s_tb", "-o", str(simulation), str(converted)], check=True)
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result = subprocess.run([vvp, str(simulation)], check=True, capture_output=True, text=True)
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assert "APB4 I2S controller test passed" in result.stdout
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