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- Adjusted variable alignment in Makefiles for better readability. - Ensured consistent formatting across various Makefiles and scripts. - Added a new .bake.toml file to define project formatting policies for mbake. - Updated paths and variable definitions in multiple configuration files to enhance clarity. - Removed unnecessary comments and whitespace for cleaner code.
Static Timing Analysis
This directory contains OpenSTA constraints, Tcl setup, and Make integration for retroSoC timing analysis. The selected profile and synthesized netlist define the actual timing context.
Run synthesis before timing analysis, then invoke the supported OpenSTA flow:
make CONFIG=configs/ci/hazard3-rv32im-ihp130.mk SYNTH=YOSYS synth
make CONFIG=configs/ci/hazard3-rv32im-ihp130.mk STA=OPENSTA sta
Review WNS/TNS and warning changes through the generated reports and quality checks. Timing results are PDK/tool/profile dependent; do not compare unrelated variants as a gate.