mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-04 22:32:36 +00:00
maksyuki
8266791cfc
- Updated to include I2C1 in IRQ bindings. - Modified to increase IRQ group width and add I2C1 interrupt. - Enhanced to include I2C formal properties and adjust timeouts. - Added I2C-related source files to the formal verification flow. - Updated DMA wrapper in to handle I2C DMA signals. - Created a new testbench for I2C functionality verification. - Implemented I2C helper functions in for testing. - Added I2C tests in to validate controller behavior and recovery. - Updated existing tests to accommodate changes in DMA and IRQ handling.
119 lines
4.3 KiB
C
119 lines
4.3 KiB
C
#ifndef RETROSOC_HAL_I2C_H
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#define RETROSOC_HAL_I2C_H
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#include <stdbool.h>
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#include <stddef.h>
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#include <stdint.h>
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#include <retrosoc/core/status.h>
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#define RS_I2C_DMA_MAX_BYTES 16U
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#define RS_I2C_ERROR_ADDR_NACK (UINT32_C(1) << 0U)
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#define RS_I2C_ERROR_DATA_NACK (UINT32_C(1) << 1U)
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#define RS_I2C_ERROR_ARB_LOST (UINT32_C(1) << 2U)
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#define RS_I2C_ERROR_STRETCH_TO (UINT32_C(1) << 3U)
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#define RS_I2C_ERROR_BUS_TO (UINT32_C(1) << 4U)
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#define RS_I2C_ERROR_COMMAND_TO (UINT32_C(1) << 5U)
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#define RS_I2C_ERROR_COMMAND (UINT32_C(1) << 6U)
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#define RS_I2C_ERROR_RX_OVERFLOW (UINT32_C(1) << 7U)
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#define RS_I2C_ERROR_CONFIG (UINT32_C(1) << 8U)
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#define RS_I2C_ERROR_ABORTED (UINT32_C(1) << 9U)
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#define RS_I2C_ERROR_RECOVERY (UINT32_C(1) << 10U)
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#define RS_I2C_ERROR_ALL UINT32_C(0x7FF)
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#define RS_I2C_INTR_DONE (UINT32_C(1) << 0U)
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#define RS_I2C_INTR_CMD_WATERMARK (UINT32_C(1) << 1U)
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#define RS_I2C_INTR_RX_WATERMARK (UINT32_C(1) << 2U)
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#define RS_I2C_INTR_NACK (UINT32_C(1) << 3U)
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#define RS_I2C_INTR_ARB_LOST (UINT32_C(1) << 4U)
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#define RS_I2C_INTR_TIMEOUT (UINT32_C(1) << 5U)
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#define RS_I2C_INTR_ERROR (UINT32_C(1) << 6U)
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#define RS_I2C_INTR_RECOVERY_DONE (UINT32_C(1) << 7U)
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#define RS_I2C_INTR_ALL UINT32_C(0xFF)
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typedef enum {
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RS_I2C_BUS_0 = 0,
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RS_I2C_BUS_1 = 1,
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} rs_i2c_bus_t;
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typedef enum {
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RS_I2C_REGISTER_ADDRESS_8_BIT = 1,
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RS_I2C_REGISTER_ADDRESS_16_BIT = 2,
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} rs_i2c_register_address_width_t;
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typedef struct {
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uint16_t scl_low_cycles;
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uint16_t scl_high_cycles;
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uint16_t start_hold_cycles;
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uint16_t start_setup_cycles;
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uint16_t data_hold_cycles;
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uint16_t data_setup_cycles;
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uint16_t stop_setup_cycles;
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uint16_t bus_free_cycles;
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} rs_i2c_timing_t;
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typedef struct {
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uint32_t source_clock_hz;
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uint32_t bus_hz;
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uint32_t stretch_timeout_us;
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uint32_t bus_idle_timeout_us;
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uint32_t command_timeout_us;
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uint8_t scl_filter_cycles;
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uint8_t sda_filter_cycles;
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uint8_t command_watermark;
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uint8_t rx_watermark;
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} rs_i2c_config_t;
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typedef struct {
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uint16_t address;
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bool ten_bit_address;
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const uint8_t *tx_data;
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size_t tx_length;
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uint8_t *rx_data;
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size_t rx_length;
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} rs_i2c_transfer_t;
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typedef struct {
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uint16_t address;
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bool ten_bit_address;
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uint16_t register_address;
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rs_i2c_register_address_width_t register_address_width;
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} rs_i2c_register_access_t;
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typedef struct {
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uint32_t flags;
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uint32_t command_level;
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uint32_t rx_level;
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uint32_t errors;
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uint32_t interrupt_state;
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} rs_i2c_status_t;
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typedef struct {
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uint32_t words[RS_I2C_DMA_MAX_BYTES];
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} rs_i2c_dma_workspace_t;
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rs_status_t rs_i2c_timing_calculate(uint32_t source_clock_hz, uint32_t bus_hz,
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rs_i2c_timing_t *timing);
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rs_status_t rs_i2c_configure(rs_i2c_bus_t bus, const rs_i2c_config_t *config, rs_timeout_t timeout);
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rs_status_t rs_i2c_init(rs_i2c_bus_t bus, uint32_t source_clock_hz, uint32_t bus_hz);
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rs_status_t rs_i2c_transfer(rs_i2c_bus_t bus, const rs_i2c_transfer_t *transfer,
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rs_timeout_t timeout);
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rs_status_t rs_i2c_register_write(rs_i2c_bus_t bus, const rs_i2c_register_access_t *access,
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const uint8_t *data, size_t length, rs_timeout_t timeout);
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rs_status_t rs_i2c_register_read(rs_i2c_bus_t bus, const rs_i2c_register_access_t *access,
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uint8_t *data, size_t length, rs_timeout_t timeout);
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rs_status_t rs_i2c_abort(rs_i2c_bus_t bus, rs_timeout_t timeout);
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rs_status_t rs_i2c_recover(rs_i2c_bus_t bus, rs_timeout_t timeout);
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rs_status_t rs_i2c_get_status(rs_i2c_bus_t bus, rs_i2c_status_t *status);
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rs_status_t rs_i2c_irq_enable(rs_i2c_bus_t bus, uint32_t mask);
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rs_status_t rs_i2c_irq_ack(rs_i2c_bus_t bus, uint32_t mask);
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rs_status_t rs_i2c_irq_test(rs_i2c_bus_t bus, uint32_t mask);
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rs_status_t rs_i2c_write_dma(rs_i2c_bus_t bus, uint16_t address, bool ten_bit_address,
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const uint8_t *data, size_t length, rs_i2c_dma_workspace_t *workspace,
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rs_timeout_t timeout);
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rs_status_t rs_i2c_read_dma(rs_i2c_bus_t bus, uint16_t address, bool ten_bit_address, uint8_t *data,
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size_t length, rs_i2c_dma_workspace_t *workspace, rs_timeout_t timeout);
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#endif
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