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https://github.com/retroSoC/retroSoC.git
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maksyuki
e3ddeacea3
- Updated to include support for the ICS55 PDK, allowing for conditional source inputs and configuration checks. - Added new test cases for the ICS55 platform, including PLL backend and GPIO readback functionality. - Modified existing tests to accommodate changes in configuration and source input handling. - Introduced new parameters in the testbench for better configurability. - Ensured compatibility checks for the IHP130 and ICS55 PDKs in the feasibility script. - Enhanced the publication tests to validate hardware changes more robustly.
Shared RTL Flow Helpers
These product-independent helpers parse filelists, convert SystemVerilog,
generate address/pad artifacts, and prepare simulation inputs. Both products
invoke them here directly, with Python imports through scripts.rtl. Product
inputs stay under their owning rtl/<product> directory; outputs stay below
build/.
Changes require focused generator tests, Ruff and Pytest, plus compilation of
each affected product. generate_tiny.py owns Tiny-only integration bindings.