mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-05 06:32:37 +00:00
maksyuki
8d735aafbd
- Adjusted slot assignments in to reflect new peripheral mappings. - Updated to validate new OpenC906 configurations, including generator and profile checks. - Modified to reference the new Std-series VexiiRiscv generator. - Changed cache maintenance instructions in to align with C906 specifications. - Revised assertions in to account for internal unit removals. - Updated to reflect changes in peripheral interface counts and policies. - Added new test file to ensure preservation of the frozen HP configuration in the Std-series generator.
68 lines
1.6 KiB
Plaintext
68 lines
1.6 KiB
Plaintext
/ip/interconnect/apb4_if_bridge.sv
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/top/apb4_async_bridge.sv
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/ip/peripheral/gpio_pad_bridge.sv
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/top/memory_pad_mux.sv
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/top/ribp2rib.sv
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/top/rib2ribp.sv
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/top/rib2apb.sv
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/ip/interconnect/axi4_connector.sv
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/top/axi4_master_idle.sv
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/top/axi4_mgmt_router.sv
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/top/axi4_async_bridge.sv
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/top/axi4_address_gate.sv
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/top/axi4_upsizer_32to64.sv
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/top/axi4_id_prefix.sv
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/top/axi4_interconnect.sv
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/top/axi4_data_crossbar.sv
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/top/axi4_target_guard.sv
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/top/fabric_monitor.sv
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/top/soc_data_plane.sv
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/top/data_plane_fault_cdc.sv
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/ip/interconnect/axi4_error_slave.sv
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/top/rib2axi4.sv
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/ip/interconnect/ahbl2axi4.sv
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/top/axi42apb4_system.sv
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/top/axi42apb4_periph.sv
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/top/axi4_word_bridge.sv
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/top/axi4_downsizer_64to32.sv
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/top/axi4_downsizer_128to64.sv
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/top/axi4_mmio_demux.sv
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/top/hp_axi4_mux3.sv
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/top/axi42ram.sv
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/top/rib_error_slave.sv
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/top/rib2ram.sv
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/top/core_wrapper.sv
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/top/retrosoc.sv
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/top/retrosoc_asic.sv
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/top/retrosoc_core.sv
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/ip/memory/onchip_ram_reg.sv
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/ip/memory/onchip_ram.sv
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/top/resource_controller.sv
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/top/apb4_periph.sv
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/top/apb4_system.sv
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/top/rib_bus.sv
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/top/axi4_bus.sv
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/top/rcu.sv
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/top/pll_rcu_controller.sv
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/top/clock_config_controller.sv
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/top/clock_frequency_monitor.sv
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/top/soc_clock_gate.sv
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/top/soc_clock_reset_subsystem.sv
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/ip/core/mgmt_debug_reset.sv
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/top/hp_lifecycle_controller.sv
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/ip/core/mgmt_debug_wrapper.sv
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/ip/core/mgmt_core_wrapper.sv
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/top/hp_core_wrapper.sv
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/top/hp_subsystem.sv
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/top/user_core_design.sv
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/top/user_core_top.sv
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/top/user_ip_design_template.sv
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/top/user_ip_top.sv
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/top/user_ip_wrapper.sv
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/top/extension_slot.sv
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/top/extension_dma_master.sv
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/top/extension_compat.sv
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/top/extension_subsystem.sv
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/sva/rib_protocol_sva.sv
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/sva/axi4_interconnect_sva.sv
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