mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-04 22:32:36 +00:00
maksyuki
3addf412d6
- Added i2c_if.sv and spi_if.sv to rtl_style_audit.json for proper inclusion in style checks. - Updated test_i2c.py to reference i2c_if.sv from the serial directory instead of the cluster IP directory. - Modified test_spisd.py to point to spi_if.sv in the storage directory instead of the cluster IP directory.
129 lines
3.7 KiB
Python
129 lines
3.7 KiB
Python
"""Focused standalone SPI-SD RTL regressions."""
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from __future__ import annotations
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import shutil
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import subprocess
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from pathlib import Path
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ROOT = Path(__file__).resolve().parents[1]
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CONVERTER = ROOT / "rtl/mini/script/convt_sv2v.py"
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BUILD = ROOT / "build/test-spisd"
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COMMON_REGISTER = "rtl/managed/clusterip/common/rtl/utils/register.sv"
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INCDIRS = [
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"rtl/managed/clusterip/common/rtl",
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"rtl/managed/clusterip/common/rtl/interface",
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"rtl/ip/peripheral",
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"rtl/ip/storage",
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]
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def _run_tb(name: str, top: str, sources: list[str], marker: str) -> None:
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iverilog = shutil.which("iverilog")
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vvp = shutil.which("vvp")
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if iverilog is None or vvp is None:
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return
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BUILD.mkdir(parents=True, exist_ok=True)
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filelist = BUILD / f"{name}.fl"
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filelist.write_text(
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"\n".join(
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[
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"+define+SV_ASSRT_DISABLE",
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*(f"+incdir+{ROOT / path}" for path in INCDIRS),
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*(str(ROOT / path) for path in sources),
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]
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)
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+ "\n",
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encoding="utf-8",
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)
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converted = BUILD / f"{name}.v"
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simulation = BUILD / f"{name}.vvp"
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subprocess.run(
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["python3", str(CONVERTER), "-f", str(filelist), "--output", str(converted)],
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check=True,
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)
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subprocess.run(
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[iverilog, "-g2012", "-s", top, "-o", str(simulation), str(converted)],
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check=True,
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)
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result = subprocess.run(
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[vvp, str(simulation)], check=True, text=True, capture_output=True
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)
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assert marker in result.stdout
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def test_spisd_crc_vectors() -> None:
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_run_tb(
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"crc",
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"spisd_crc_tb",
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["rtl/ip/storage/spisd_pkg.sv", "tests/rtl/spisd_crc_tb.sv"],
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"SPISD CRC vectors passed",
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)
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def test_spisd_phase_clock() -> None:
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_run_tb(
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"clock",
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"spisd_clock_tb",
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[COMMON_REGISTER, "rtl/ip/storage/spisd_clock.sv", "tests/rtl/spisd_clock_tb.sv"],
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"SPISD phase clock and low-only pause test passed",
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)
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def test_spisd_command_engine() -> None:
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_run_tb(
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"command",
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"spisd_command_tb",
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[
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"rtl/ip/storage/spisd_pkg.sv",
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COMMON_REGISTER,
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"rtl/ip/storage/spisd_clock.sv",
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"rtl/ip/storage/spisd_command.sv",
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"tests/rtl/spisd_command_tb.sv",
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],
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"SPISD command frame, R1 response, and timeout test passed",
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)
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def test_spisd_data_engine() -> None:
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_run_tb(
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"data",
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"spisd_data_tb",
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[
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"rtl/ip/storage/spisd_pkg.sv",
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COMMON_REGISTER,
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"rtl/ip/storage/spisd_data.sv",
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"tests/rtl/spisd_data_tb.sv",
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],
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"SPISD read/write data, CRC, and backpressure test passed",
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)
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def test_spisd_wrapper_apb_and_training() -> None:
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_run_tb(
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"wrapper",
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"spisd_wrapper_tb",
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[
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"rtl/managed/clusterip/common/rtl/interface/apb4_if.sv",
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"rtl/managed/clusterip/common/rtl/interface/axi4_if.sv",
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"rtl/ip/storage/spi_if.sv",
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"rtl/ip/storage/spisd_pkg.sv",
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"rtl/ip/storage/spisd_define.svh",
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COMMON_REGISTER,
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"rtl/managed/clusterip/common/rtl/utils/fifo.sv",
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"rtl/ip/peripheral/dma_axi4_master.sv",
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"rtl/ip/storage/sdio_pkg.sv",
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"rtl/ip/storage/sdio_dma.sv",
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"rtl/ip/storage/spisd_clock.sv",
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"rtl/ip/storage/spisd_command.sv",
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"rtl/ip/storage/spisd_data.sv",
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"rtl/ip/storage/spisd_reg.sv",
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"rtl/ip/storage/spisd_core.sv",
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"rtl/ip/storage/apb4_spisd.sv",
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"rtl/mini/dv/tb/spisd_card.sv",
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"tests/rtl/spisd_wrapper_tb.sv",
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],
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"SPISD APB ABI, training, card model, and DMA abort test passed",
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)
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