mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-04 22:32:36 +00:00
maksyuki
b72e14ea40
- Introduced for independent mathematical operations and RSA fixtures. - Implemented for testing DMA channels with AES ECB and memory interactions. - Created to validate RSA-2048 operations and Montgomery reduction. - Developed for testing AES and SHA vector compliance. - Added to validate image packing, integer root calculations, and inventory checks. - Ensured robust error handling and validation in tests to catch data corruption and recursive hierarchy issues.
28 lines
1.2 KiB
Tcl
28 lines
1.2 KiB
Tcl
# Copyright (c) 2026 Yuchi Miao <miaoyuchi@ict.ac.cn>
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# SPDX-License-Identifier: MulanPSL-2.0
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# Diagnostic checkpoints around the UNCHANGED full-SoC synthesis recipe.
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# The only elaboration difference is the explicit standalone interface boundary.
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rename yosys crypto_original_yosys
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proc yosys {args} {
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set command [lindex $args 0]
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if {$command eq "read_slang"} {
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lappend args --allow-toplevel-iface-ports
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}
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if {$command eq "memory"} {
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crypto_original_yosys write_json "$::env(REPORTS)/pre_memory_design.json"
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}
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if {$command eq "opt_dff" && [lsearch -exact $args -sat] >= 0} {
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crypto_original_yosys write_json "$::env(REPORTS)/pre_sat_design.json"
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}
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set result [uplevel 1 [list crypto_original_yosys {*}$args]]
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if {$command eq "proc"} {
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crypto_original_yosys write_json "$::env(REPORTS)/initial_design.json"
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}
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if {$command eq "opt_dff" && [lsearch -exact $args -sat] >= 0} {
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crypto_original_yosys write_json "$::env(REPORTS)/post_sat_design.json"
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}
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return $result
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}
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source [file join [file dirname [info script]] synth.tcl]
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crypto_original_yosys write_json "$::env(REPORTS)/mapped_design.json"
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