mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-05 06:32:37 +00:00
- Added i2c_if.sv and spi_if.sv to rtl_style_audit.json for proper inclusion in style checks. - Updated test_i2c.py to reference i2c_if.sv from the serial directory instead of the cluster IP directory. - Modified test_spisd.py to point to spi_if.sv in the storage directory instead of the cluster IP directory.
66 lines
2.0 KiB
Python
66 lines
2.0 KiB
Python
"""Directed I2C controller, FIFO, error, timeout, and recovery tests."""
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from __future__ import annotations
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import shutil
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import subprocess
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import sys
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from pathlib import Path
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ROOT = Path(__file__).resolve().parents[1]
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def test_i2c_controller_and_recovery_contract(tmp_path: Path) -> None:
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iverilog = shutil.which("iverilog")
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vvp = shutil.which("vvp")
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if iverilog is None or vvp is None:
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return
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common = ROOT / "rtl/managed/clusterip/common/rtl"
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serial = ROOT / "rtl/ip/serial"
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source_list = tmp_path / "i2c.fl"
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source_list.write_text(
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"\n".join(
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[
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"+define+SV_ASSRT_DISABLE",
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f"+incdir+{common}",
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f"+incdir+{common / 'interface'}",
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f"+incdir+{common / 'utils'}",
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f"+incdir+{common / 'cdc'}",
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f"+incdir+{serial}",
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str(common / "interface/apb4_if.sv"),
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str(common / "utils/register.sv"),
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str(common / "utils/fifo.sv"),
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str(common / "cdc/cdc_sync.sv"),
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str(serial / "i2c_if.sv"),
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str(serial / "i2c_filter.sv"),
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str(serial / "i2c_core.sv"),
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str(serial / "i2c_reg.sv"),
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str(serial / "apb4_i2c.sv"),
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str(ROOT / "tests/rtl/i2c_tb.sv"),
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"",
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]
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),
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encoding="utf-8",
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)
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converted = tmp_path / "i2c_tb.v"
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subprocess.run(
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[
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sys.executable,
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str(ROOT / "rtl/mini/script/convt_sv2v.py"),
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"-f",
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str(source_list),
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"--output",
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str(converted),
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],
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check=True,
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)
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simulation = tmp_path / "i2c_tb"
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subprocess.run(
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[iverilog, "-g2012", "-s", "i2c_tb", "-o", str(simulation), str(converted)],
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check=True,
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)
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result = subprocess.run([vvp, str(simulation)], text=True, capture_output=True, check=True)
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assert "I2C transfer, error, stretch, arbitration, and recovery test passed" in result.stdout
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