mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-04 22:32:36 +00:00
maksyuki
d51d58dd25
- Introduced to define formal properties for the sysctrl module. - Updated to include new formal properties and source files. - Renamed to in the bus module and created a new file. - Implemented a testbench for in . - Removed the obsolete test file. - Updated test scripts to reference the new instead of the old RAM module. - Adjusted various test files to ensure compatibility with the new structure and naming conventions.
23 lines
487 B
Plaintext
23 lines
487 B
Plaintext
/top/apb4_if_bridge.sv
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/top/gpio_pad_bridge.sv
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/top/soc_ribl2rib.sv
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/top/ribp2rib.sv
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/top/soc_rib2ribp.sv
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/top/soc_rib_error_slave.sv
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/top/soc_rib2ram.sv
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/top/core_wrapper.sv
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/top/retrosoc.sv
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/top/retrosoc_asic.sv
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/top/onchip_ram.sv
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/top/ip_ribp_wrapper.sv
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/top/ip_apb_wrapper.sv
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/top/bus.sv
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/top/rcu.sv
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/top/mgmt_core_wrapper.sv
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/top/user_core_design_template.sv
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/top/user_core_top.sv
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/top/user_ip_design_template.sv
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/top/user_ip_top.sv
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/top/user_ip_wrapper.sv
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/sva/soc_protocol_sva.sv
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