mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-05 06:32:37 +00:00
maksyuki
dd340b9bd6
Add an isolated SAFE24 QVGA capture, CPU statistics and SDIO save/readback image with passive transaction observers. Keep ordinary images, production RTL, public interfaces and dependency versions unchanged. Retain matched binaries and source-bound stage evidence, distinguish software comparisons from architectural measurements, and reject invalid terminal results or incompatible resume inputs. Count SDIO descriptors and status writebacks separately from pixel payload. Validation on the final worktree includes 2031 passed / 1 skipped Pytest tests, C format/policy/host checks, and directed observer tests on Icarus and Verilator. Selected ICS55 and IHP130 SAFE24 campaigns and compact backend checks pass; negative STA and warning observations are retained. Complete P10 acceptance remains pending final regression and human review. Specification: docs/ip/tiny-soc.md, TINY-R2-P10.
264 lines
9.7 KiB
C
264 lines
9.7 KiB
C
#include <retrosoc/arch/riscv/system_base.h>
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#include <retrosoc/hal/dma.h>
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#include <retrosoc/hal/dvp.h>
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#include <retrosoc/hal/rcu.h>
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#include <retrosoc/hal/sdio.h>
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#include <retrosoc/hal/sysctrl.h>
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#include <retrosoc/hal/uart.h>
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#include <retrosoc/hal/xpi_psram.h>
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#include <retrosoc/lib/printf.h>
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#include "p9_frame.h"
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#include "p9_startup.h"
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#include "p10_frame.h"
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#define RS_P10_FRAME_ADDRESS UINT32_C(0x54010000)
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#define RS_P10_BYTES UINT32_C(153600)
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#define RS_P10_WORDS (RS_P10_BYTES / 4U)
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#define RS_P10_GUARD UINT32_C(0x5A36C9E7)
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typedef struct {
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uint32_t before[16];
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uint32_t words[256];
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uint32_t after[16];
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} rs_p10_buffer_t;
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typedef struct {
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uint64_t cycles;
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uint64_t instructions;
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uint32_t bytes;
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uint32_t calls;
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} rs_p10_window_t;
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static _Alignas(64) rs_p10_buffer_t rs_p10_transmit;
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static _Alignas(64) rs_p10_buffer_t rs_p10_receive;
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static rs_p10_statistics_t rs_p10_statistics = {.checksum = UINT32_C(2166136261)};
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static rs_p10_window_t rs_p10_windows[5];
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static uint64_t rs_p10_cycle_start;
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static uint64_t rs_p10_instruction_start;
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static uint64_t rs_p10_cycles(void) {
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uint32_t high, low, again;
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do {
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high = __RV_CSR_READ(CSR_CYCLEH);
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low = __RV_CSR_READ(CSR_CYCLE);
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again = __RV_CSR_READ(CSR_CYCLEH);
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} while (high != again);
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return ((uint64_t)high << 32U) | low;
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}
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static uint64_t rs_p10_instructions(void) {
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uint32_t high, low, again;
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do {
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high = __RV_CSR_READ(CSR_INSTRETH);
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low = __RV_CSR_READ(CSR_INSTRET);
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again = __RV_CSR_READ(CSR_INSTRETH);
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} while (high != again);
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return ((uint64_t)high << 32U) | low;
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}
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static bool rs_p10_begin(void) {
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if (rs_sysctrl_set_perf_control(true, true, false) != RS_OK) {
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return false;
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}
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rs_p10_cycle_start = rs_p10_cycles();
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rs_p10_instruction_start = rs_p10_instructions();
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return true;
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}
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static bool rs_p10_end(uint32_t phase, uint32_t bytes) {
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const uint64_t instructions = rs_p10_instructions() - rs_p10_instruction_start;
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const uint64_t cycles = rs_p10_cycles() - rs_p10_cycle_start;
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if (phase >= 5U || rs_sysctrl_set_perf_control(false, false, true) != RS_OK) {
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return false;
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}
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rs_p10_windows[phase].cycles += cycles;
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rs_p10_windows[phase].instructions += instructions;
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rs_p10_windows[phase].bytes += bytes;
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rs_p10_windows[phase].calls++;
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return true;
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}
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static bool rs_p10_guards(void) {
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const volatile uint32_t *const frame = (const volatile uint32_t *)RS_P10_FRAME_ADDRESS;
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if (*(const volatile uint32_t *)(RS_P10_FRAME_ADDRESS - 4U) != RS_P10_GUARD ||
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frame[RS_P10_WORDS] != RS_P10_GUARD) {
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return false;
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}
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for (uint32_t index = 0U; index < 16U; ++index) {
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if (rs_p10_transmit.before[index] != RS_P10_GUARD ||
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rs_p10_transmit.after[index] != RS_P10_GUARD ||
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rs_p10_receive.before[index] != RS_P10_GUARD ||
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rs_p10_receive.after[index] != RS_P10_GUARD) {
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return false;
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}
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}
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return true;
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}
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static bool rs_p10_pins(uint32_t first, uint32_t last, rs_gpio_mode_t mode) {
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const rs_gpio_config_t config = {
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.mode = mode,
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.pull = RS_GPIO_PULL_NONE,
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.trigger = RS_GPIO_TRIGGER_NONE,
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};
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for (uint32_t pin = first; pin <= last; ++pin) {
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if (rs_gpio_configure(pin, &config) != RS_OK) {
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return false;
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}
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}
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return true;
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}
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static uint8_t rs_p10_capture(void) {
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const rs_dvp_config_t config = {
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.format = RS_DVP_FORMAT_RGB565,
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.frame_width = 320U,
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.frame_height = 240U,
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.crop_width = 320U,
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.crop_height = 240U,
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.snapshot = true,
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.stream_enable = true,
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};
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rs_dvp_status_t dvp;
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rs_dma_status_t dma;
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rs_xpi_error_t xpi;
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if (rs_dvp_configure(&config) != RS_OK || !rs_p10_begin()) {
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return 3U;
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}
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const rs_status_t result =
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rs_dvp_capture_dma(RS_P10_FRAME_ADDRESS, RS_P10_WORDS, RS_TIMEOUT_DEFAULT);
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if (!rs_p10_end(0U, RS_P10_BYTES) || result != RS_OK || rs_dvp_get_status(&dvp) != RS_OK ||
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rs_dma_get_status(RS_DMA_CHANNEL_DVP, &dma) != RS_OK || rs_xpi_error_get(&xpi) != RS_OK ||
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xpi.valid || dvp.error_status != 0U || dvp.active || dvp.pixel_count != 76800U ||
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dvp.word_count != RS_P10_WORDS || !dma.done || dma.busy || dma.error ||
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dma.bytes_done != RS_P10_BYTES || !rs_p10_guards()) {
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return 3U;
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}
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/* No further camera frame or DMA work is admitted during processing/save. */
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return rs_dvp_abort() == RS_OK ? 0U : 3U;
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}
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static uint8_t rs_p10_process(void) {
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const volatile uint32_t *const frame = (const volatile uint32_t *)RS_P10_FRAME_ADDRESS;
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if (!rs_p10_begin()) {
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return 4U;
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}
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for (uint32_t index = 0U; index < RS_P10_WORDS; ++index) {
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const uint32_t word = frame[index];
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if (word != rs_p9_frame_word(index / 160U, index % 160U, false) ||
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rs_p10_accumulate(&rs_p10_statistics, word) != RS_OK) {
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(void)rs_p10_end(1U, index * 4U);
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return 4U;
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}
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}
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return rs_p10_end(1U, RS_P10_BYTES) && rs_p10_guards() ? 0U : 4U;
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}
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static uint8_t rs_p10_save(const rs_sd_memory_info_t *card) {
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const volatile uint32_t *const frame = (const volatile uint32_t *)RS_P10_FRAME_ADDRESS;
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for (uint32_t chunk = 0U; chunk < 150U; ++chunk) {
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uint32_t offset, block;
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if (rs_p10_chunk(RS_P10_BYTES, chunk, card->capacity_blocks, &offset, &block) != RS_OK ||
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!rs_p10_begin()) {
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return 5U;
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}
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for (uint32_t word = 0U; word < 256U; ++word) {
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rs_p10_transmit.words[word] = frame[offset + word];
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rs_p10_receive.words[word] = UINT32_C(0xDEADBEEF);
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}
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if (!rs_p10_end(2U, 1024U) || !rs_p10_begin()) {
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return 5U;
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}
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rs_status_t result = rs_sd_memory_write_blocks(RS_SDIO_INSTANCE_0, card, block, 2U,
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rs_p10_transmit.words, RS_TIMEOUT_DEFAULT);
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if (!rs_p10_end(3U, 1024U) || result != RS_OK || !rs_p10_begin()) {
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return 5U;
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}
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result = rs_sd_memory_read_blocks(RS_SDIO_INSTANCE_0, card, block, 2U, rs_p10_receive.words,
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RS_TIMEOUT_DEFAULT);
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bool matches = result == RS_OK;
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for (uint32_t word = 0U; word < 256U; ++word) {
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const uint32_t index = offset + word;
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if (rs_p10_receive.words[word] != rs_p9_frame_word(index / 160U, index % 160U, false)) {
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matches = false;
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}
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}
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if (!rs_p10_end(4U, 1024U) || !matches || !rs_p10_guards()) {
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return 6U;
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}
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if (chunk % 32U == 0U) {
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printf("P10_PROGRESS chunks=%u\n", chunk + 1U);
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}
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}
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return 0U;
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}
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int main(void) {
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rs_tiny_rcu_snapshot_t clock;
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rs_xpi_psram_t psram;
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rs_sd_memory_info_t card;
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uint8_t code = 0U;
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__disable_irq();
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if (rs_tiny_rcu_get_snapshot(&clock) != RS_OK || !rs_p9_console_ready(&clock, rs_uart_init)) {
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rs_sysctrl_write_test_status(false, 1U);
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for (;;) {
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}
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}
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if (clock.sys_hz != 24000000U || clock.mem_hz != 24000000U || clock.pclk_hz != 24000000U ||
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!rs_p9_psram_pin_ready(rs_gpio_configure) || !rs_p10_pins(12U, 23U, RS_GPIO_MODE_ALT1) ||
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!rs_p10_pins(0U, 5U, RS_GPIO_MODE_ALT0) || rs_tiny_rcu_set_clkout(1U, 1U) != RS_OK ||
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rs_xpi_psram_initialize(clock.mem_hz, RS_TIMEOUT_DEFAULT, &psram) != RS_OK ||
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rs_xpi_psram_validate_dma(&psram, RS_P10_FRAME_ADDRESS, RS_P10_BYTES, 4U) != RS_OK ||
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rs_sd_memory_initialize(RS_SDIO_INSTANCE_0, clock.pclk_hz, &card, RS_TIMEOUT_DEFAULT) !=
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RS_OK ||
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card.capacity_blocks < 316U || card.actual_clock_hz != 12000000U) {
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code = 2U;
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} else {
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*(volatile uint32_t *)(RS_P10_FRAME_ADDRESS - 4U) = RS_P10_GUARD;
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((volatile uint32_t *)RS_P10_FRAME_ADDRESS)[RS_P10_WORDS] = RS_P10_GUARD;
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for (uint32_t index = 0U; index < 16U; ++index) {
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rs_p10_transmit.before[index] = RS_P10_GUARD;
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rs_p10_transmit.after[index] = RS_P10_GUARD;
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rs_p10_receive.before[index] = RS_P10_GUARD;
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rs_p10_receive.after[index] = RS_P10_GUARD;
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}
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printf("P10_STAGE capture\n");
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code = rs_p10_capture();
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if (code == 0U) {
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printf("P10_STAGE process\n");
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code = rs_p10_process();
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}
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if (code == 0U) {
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printf("P10_STAGE save\n");
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code = rs_p10_save(&card);
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}
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if (code == 0U) {
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rs_xpi_error_t error;
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rs_sdio_status_t storage;
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if (rs_xpi_error_get(&error) != RS_OK || error.valid ||
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rs_sdio_status_get(RS_SDIO_INSTANCE_0, &storage) != RS_OK ||
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storage.error_status != 0U || storage.busy || !rs_p10_guards()) {
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code = 7U;
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}
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}
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}
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(void)rs_sysctrl_set_perf_control(false, false, true);
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for (uint32_t phase = 0U; phase < 5U; ++phase) {
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printf("P10_PHASE id=%u calls=%u bytes=%u cycles=%llu instructions=%llu\n", phase,
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rs_p10_windows[phase].calls, rs_p10_windows[phase].bytes,
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(unsigned long long)rs_p10_windows[phase].cycles,
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(unsigned long long)rs_p10_windows[phase].instructions);
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}
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for (uint32_t bin = 0U; bin < 32U; ++bin) {
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printf("P10_HIST bin=%u pixels=%u\n", bin, rs_p10_statistics.red[bin]);
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}
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printf("P10_RESULT code=%u pixels=%u bytes=%u sectors=%u checksum=%u\n", code,
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rs_p10_statistics.pixels, code == 0U ? RS_P10_BYTES : 0U, code == 0U ? 300U : 0U,
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rs_p10_statistics.checksum);
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(void)rs_tiny_rcu_set_clkout(0U, 0U);
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rs_sysctrl_write_test_status(code == 0U, code);
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for (;;) {
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}
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}
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