mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-04 22:32:36 +00:00
- Introduced a new USB2 transaction engine testbench to validate the functionality of the USB2 transaction engine. - Updated clock and reset domain tests to include USB2 ULPI crossings. - Enhanced memory map tests to verify USB2 base addresses and performance offsets. - Modified pin map tests to ensure USB2 ULPI pins are correctly generated. - Updated SOC topology tests to account for USB2 peripherals and IRQ mappings. - Added static timing analysis constraints for USB2 clock domains. - Created dedicated USB2 tests for various components including packet RAM, descriptor validation, and transaction engine. - Implemented a register parity test to ensure ABI consistency between RTL and C header definitions.
489 lines
14 KiB
JSON
489 lines
14 KiB
JSON
{
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"schema_version": 2,
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"reset_ports": ["ext_rst_n_i_pad"],
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"domains": [
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{
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"name": "external",
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"clock": "s_ext_clk_buf",
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"reset": "s_ext_rst_n_sync",
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"reset_source": "ext_rst_n_i",
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"reset_primitive": "rst_sync",
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"path": "rtl/mini/top/rcu.sv",
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"instance": "u_ext_rst_sync",
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"sta": {
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"source_port": "extclk_i_pad",
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"pin": "u_rcu.u_ext_clk_buf/clk_o",
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"period_ns": 13.888888889,
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"async_group": "external"
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}
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},
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{
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"name": "system",
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"clock": "sys_clk_o",
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"reset": "s_sys_rst_n_sync",
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"reset_source": "s_sys_reset_source_n",
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"reset_primitive": "rst_sync",
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"path": "rtl/mini/top/rcu.sv",
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"instance": "u_sys_rst_sync",
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"sta": {
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"source_domain": "external",
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"pin": "u_rcu.u_sys_clk_buf/clk_o",
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"period_ns": 13.888888889,
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"async_group": "external"
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}
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},
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{
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"name": "audio",
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"clock": "s_aud_clk_buf",
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"reset": "s_aud_rst_n_sync",
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"reset_source": "ext_rst_n_i",
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"reset_primitive": "rst_sync",
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"path": "rtl/mini/top/rcu.sv",
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"instance": "u_aud_rst_sync",
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"sta": {
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"source_port": "audclk_i_pad",
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"pin": "u_rcu.u_aud_clk_buf/clk_o",
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"period_ns": 54.253472222,
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"async_group": "audio"
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}
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},
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{
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"name": "jtag",
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"clock": "s_jtag_tck_buf",
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"reset": "s_jtag_trst_n_sync",
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"reset_source": "jtag_trst_n_i",
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"reset_primitive": "rst_sync",
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"path": "rtl/mini/top/mgmt_debug_wrapper.sv",
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"instance": "u_jtag_rst_sync",
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"sta": {
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"source_port": "jtag_tck_i_pad",
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"object_type": "port",
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"period_ns": 100.0,
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"async_group": "jtag"
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}
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},
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{
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"name": "dvp",
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"clock": "s_pclk_sel",
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"reset": "s_dvp_pclk_rst_n_sync",
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"reset_source": "rst_n_i",
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"reset_primitive": "rst_sync",
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"path": "rtl/ip/multimedia/axi4s_dvp.sv",
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"instance": "u_dvp_pclk_rst_sync",
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"sta": {
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"source_port": "gpio_10_io_pad",
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"pin": "u_retrosoc.u_apb4_periph.u_axi4_dvp.u_dvp_pclk_clk_buf/clk_o",
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"period_ns": 41.666666667,
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"async_group": "dvp"
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}
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},
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{
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"name": "usb2_ulpi",
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"clock": "clk_ulpi_i",
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"reset": "s_ulpi_rst_n",
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"reset_source": "rst_n_i",
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"reset_primitive": "rst_sync",
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"path": "rtl/ip/usb/apb4_usb2.sv",
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"instance": "u_ulpi_rst_sync",
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"sta": {
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"source_port": "usb2_ulpi_clk_i_pad",
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"object_type": "port",
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"period_ns": 16.666666667,
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"async_group": "usb2_ulpi"
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}
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}
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],
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"crossings": [
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{
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"name": "pll_request",
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"source": "system",
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"destination": "external",
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"primitive": "cdc_2phase",
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"path": "rtl/mini/top/pll_rcu_controller.sv",
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"instance": "u_pll_request_cdc"
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},
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{
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"name": "pll_response",
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"source": "external",
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"destination": "system",
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"primitive": "cdc_2phase",
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"path": "rtl/mini/top/pll_rcu_controller.sv",
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"instance": "u_pll_response_cdc"
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},
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{
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"name": "clint_timebase",
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"source": "external",
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"destination": "system",
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"primitive": "edge_det",
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"path": "rtl/ip/peripheral/clint_timebase.sv",
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"instance": "u_tick_edge_det"
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},
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{
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"name": "dvp_enable",
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"source": "system",
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"destination": "dvp",
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"primitive": "cdc_2phase",
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"path": "rtl/ip/multimedia/axi4s_dvp.sv",
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"instance": "u_dvp_config_cdc"
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},
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{
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"name": "dvp_fifo",
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"source": "dvp",
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"destination": "system",
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"primitive": "cdc_fifo_warm_flush",
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"path": "rtl/ip/multimedia/axi4s_dvp.sv",
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"instance": "u_dvp_payload_fifo"
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},
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{
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"name": "rtc_command",
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"source": "system",
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"destination": "audio",
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"primitive": "async_reqack",
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"path": "rtl/managed/clusterip/rtc/rtl/apb4_rtc.sv",
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"instance": "u_command_mailbox"
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},
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{
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"name": "rtc_response",
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"source": "audio",
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"destination": "system",
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"primitive": "async_reqack",
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"path": "rtl/managed/clusterip/rtc/rtl/apb4_rtc.sv",
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"instance": "u_response_mailbox"
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},
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{
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"name": "rtc_event",
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"source": "audio",
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"destination": "system",
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"primitive": "cdc_sync",
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"path": "rtl/managed/clusterip/rtc/rtl/apb4_rtc.sv",
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"instance": "u_event_sync"
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},
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{
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"name": "rtc_status",
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"source": "audio",
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"destination": "system",
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"primitive": "cdc_sync",
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"path": "rtl/managed/clusterip/rtc/rtl/apb4_rtc.sv",
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"instance": "u_status_sync"
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},
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{
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"name": "rtc_interrupt_enable",
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"source": "audio",
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"destination": "system",
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"primitive": "cdc_sync",
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"path": "rtl/managed/clusterip/rtc/rtl/apb4_rtc.sv",
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"instance": "u_interrupt_enable_sync"
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},
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{
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"name": "rtc_wake_enable",
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"source": "audio",
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"destination": "system",
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"primitive": "cdc_sync",
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"path": "rtl/managed/clusterip/rtc/rtl/apb4_rtc.sv",
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"instance": "u_wake_enable_sync"
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},
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{
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"name": "rtc_wake_status",
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"source": "audio",
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"destination": "system",
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"primitive": "cdc_sync",
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"path": "rtl/ip/peripheral/sysctrl_core.sv",
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"instance": "u_rtc_wake_sync"
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},
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{
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"name": "jtag_dmi",
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"source": "jtag",
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"destination": "system",
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"primitive": "hazard3_apb_async_bridge",
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"path": "rtl/managed/hazard3/hdl/debug/dtm/hazard3_jtag_dtm_core.v",
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"instance": "inst_hazard3_apb_async_bridge"
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},
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{
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"name": "wdg_command",
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"source": "system",
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"destination": "audio",
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"primitive": "async_reqack",
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"path": "rtl/managed/clusterip/wdg/rtl/apb4_wdg.sv",
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"instance": "u_command_mailbox"
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},
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{
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"name": "wdg_response",
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"source": "audio",
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"destination": "system",
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"primitive": "async_reqack",
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"path": "rtl/managed/clusterip/wdg/rtl/apb4_wdg.sv",
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"instance": "u_response_mailbox"
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},
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{
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"name": "wdg_debug_halted",
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"source": "system",
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"destination": "audio",
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"primitive": "cdc_sync",
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"path": "rtl/managed/clusterip/wdg/rtl/apb4_wdg.sv",
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"instance": "u_debug_halted_sync"
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},
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{
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"name": "wdg_status",
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"source": "audio",
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"destination": "system",
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"primitive": "cdc_sync",
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"path": "rtl/managed/clusterip/wdg/rtl/apb4_wdg.sv",
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"instance": "u_status_sync"
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},
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{
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"name": "wdg_reset_cause",
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"source": "audio",
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"destination": "system",
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"primitive": "cdc_sync",
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"path": "rtl/managed/clusterip/wdg/rtl/apb4_wdg.sv",
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"instance": "u_reset_cause_sync"
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},
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{
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"name": "usb2_work",
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"source": "system",
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"destination": "usb2_ulpi",
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"primitive": "async_reqack",
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"path": "rtl/ip/usb/apb4_usb2.sv",
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"instance": "u_work_cdc"
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},
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{
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"name": "usb2_result",
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"source": "usb2_ulpi",
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"destination": "system",
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"primitive": "async_reqack",
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"path": "rtl/ip/usb/apb4_usb2.sv",
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"instance": "u_result_cdc"
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},
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{
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"name": "usb2_setup",
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"source": "usb2_ulpi",
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"destination": "system",
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"primitive": "async_reqack",
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"path": "rtl/ip/usb/apb4_usb2.sv",
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"instance": "u_setup_cdc"
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},
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{
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"name": "usb2_fill_command",
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"source": "system",
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"destination": "usb2_ulpi",
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"primitive": "async_reqack",
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"path": "rtl/ip/usb/apb4_usb2.sv",
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"instance": "u_fill_command_cdc"
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},
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{
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"name": "usb2_drain_command",
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"source": "system",
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"destination": "usb2_ulpi",
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"primitive": "async_reqack",
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"path": "rtl/ip/usb/apb4_usb2.sv",
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"instance": "u_drain_command_cdc"
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},
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{
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"name": "usb2_buffer_event",
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"source": "usb2_ulpi",
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"destination": "system",
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"primitive": "async_reqack",
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"path": "rtl/ip/usb/apb4_usb2.sv",
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"instance": "u_buffer_event_cdc"
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},
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{
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"name": "usb2_view_request",
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"source": "system",
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"destination": "usb2_ulpi",
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"primitive": "async_reqack",
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"path": "rtl/ip/usb/apb4_usb2.sv",
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"instance": "u_view_request_cdc"
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},
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{
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"name": "usb2_view_response",
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"source": "usb2_ulpi",
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"destination": "system",
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"primitive": "async_reqack",
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"path": "rtl/ip/usb/apb4_usb2.sv",
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"instance": "u_view_response_cdc"
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},
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{
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"name": "usb2_fill_stream",
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"source": "system",
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"destination": "usb2_ulpi",
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"primitive": "cdc_fifo",
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"path": "rtl/ip/usb/apb4_usb2.sv",
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"instance": "u_fill_stream_cdc"
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},
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{
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"name": "usb2_drain_stream",
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"source": "usb2_ulpi",
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"destination": "system",
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"primitive": "cdc_fifo",
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"path": "rtl/ip/usb/apb4_usb2.sv",
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"instance": "u_drain_stream_cdc"
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},
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{
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"name": "usb2_role",
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"source": "system",
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"destination": "usb2_ulpi",
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"primitive": "cdc_sync",
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"path": "rtl/ip/usb/apb4_usb2.sv",
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"instance": "u_role_sync"
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},
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{
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"name": "usb2_role_reset",
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"source": "system",
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"destination": "usb2_ulpi",
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"primitive": "cdc_sync",
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"path": "rtl/ip/usb/apb4_usb2.sv",
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"instance": "u_role_reset_sync"
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},
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{
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"name": "usb2_phy_reset",
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"source": "system",
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"destination": "usb2_ulpi",
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"primitive": "cdc_sync",
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"path": "rtl/ip/usb/apb4_usb2.sv",
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"instance": "u_phy_reset_sync"
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},
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{
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"name": "usb2_high_speed",
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"source": "system",
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"destination": "usb2_ulpi",
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"primitive": "cdc_sync",
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"path": "rtl/ip/usb/apb4_usb2.sv",
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"instance": "u_high_speed_sync"
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},
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{
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"name": "usb2_enable",
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"source": "system",
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"destination": "usb2_ulpi",
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"primitive": "cdc_sync",
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"path": "rtl/ip/usb/apb4_usb2.sv",
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"instance": "u_enable_sync"
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},
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{
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"name": "usb2_device_addr",
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"source": "system",
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"destination": "usb2_ulpi",
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"primitive": "cdc_sync",
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"path": "rtl/ip/usb/apb4_usb2.sv",
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"instance": "u_device_addr_sync"
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},
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{
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"name": "usb2_endpoint_config",
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"source": "system",
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"destination": "usb2_ulpi",
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"primitive": "cdc_sync",
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"path": "rtl/ip/usb/apb4_usb2.sv",
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"instance": "u_endpoint_cfg_sync"
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},
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{
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"name": "usb2_timeout",
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"source": "system",
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"destination": "usb2_ulpi",
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"primitive": "cdc_sync",
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"path": "rtl/ip/usb/apb4_usb2.sv",
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"instance": "u_timeout_sync"
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},
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{
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"name": "usb2_phy_status",
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"source": "usb2_ulpi",
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"destination": "system",
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"primitive": "cdc_sync",
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"path": "rtl/ip/usb/apb4_usb2.sv",
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"instance": "u_phy_status_sync"
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},
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{
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"name": "usb2_transaction_busy",
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"source": "usb2_ulpi",
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"destination": "system",
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"primitive": "cdc_sync",
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"path": "rtl/ip/usb/apb4_usb2.sv",
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"instance": "u_transaction_busy_sync"
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},
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{
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"name": "usb2_frame",
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"source": "usb2_ulpi",
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"destination": "system",
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"primitive": "cdc_sync",
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"path": "rtl/ip/usb/apb4_usb2.sv",
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"instance": "u_frame_sync"
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},
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{
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"name": "usb2_ecc_counts",
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"source": "usb2_ulpi",
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"destination": "system",
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"primitive": "cdc_sync",
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"path": "rtl/ip/usb/apb4_usb2.sv",
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"instance": "u_ecc_counts_sync"
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},
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{
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"name": "usb2_retry_event",
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"source": "usb2_ulpi",
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"destination": "system",
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"primitive": "edge_det",
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"path": "rtl/ip/usb/apb4_usb2.sv",
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"instance": "u_retry_event_sync"
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},
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{
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"name": "usb2_protocol_event",
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"source": "usb2_ulpi",
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"destination": "system",
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"primitive": "edge_det",
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"path": "rtl/ip/usb/apb4_usb2.sv",
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"instance": "u_protocol_event_sync"
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}
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],
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"same_domain_contracts": [
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{
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"name": "opipsram_phy",
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"source_domain": "system",
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"destination_domain": "system",
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"clock": "clk_phy_i",
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"reset": "rst_phy_n_i",
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"relationship": "same_physical_source_logical_cdc",
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"cdc": "cdc_2phase",
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"description": "Mini SoC v1 ties clk_phy_i to clk_i and rst_phy_n_i to rst_n_i physically, but the IP keeps distinct system and PHY transaction domains. Do not collapse the logical CDC contract when the qualified PHY clock is introduced."
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},
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{
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"name": "opipsram_command_cdc",
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"source_domain": "system",
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"destination_domain": "system",
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"logical_destination": "opipsram_phy",
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"primitive": "cdc_2phase",
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"path": "rtl/ip/memory/apb4_opipsram.sv",
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"instance": "u_command_cdc",
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"relationship": "same_physical_source_logical_cdc"
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},
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{
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"name": "opipsram_response_cdc",
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"source_domain": "system",
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"destination_domain": "system",
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"logical_source": "opipsram_phy",
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"primitive": "cdc_2phase",
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"path": "rtl/ip/memory/apb4_opipsram.sv",
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"instance": "u_response_cdc",
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"relationship": "same_physical_source_logical_cdc"
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},
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{
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"name": "opipsram_abort_cdc",
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"source_domain": "system",
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"destination_domain": "system",
|
|
"logical_destination": "opipsram_phy",
|
|
"primitive": "cdc_2phase",
|
|
"path": "rtl/ip/memory/apb4_opipsram.sv",
|
|
"instance": "u_abort_cdc",
|
|
"relationship": "same_physical_source_logical_cdc"
|
|
},
|
|
{
|
|
"name": "opipsram_rwds_capture_reset",
|
|
"source_domain": "system",
|
|
"destination_domain": "system",
|
|
"logical_source": "opipsram_phy",
|
|
"clock": "clk_phy_i",
|
|
"reset": "rst_phy_n_i",
|
|
"contract_type": "async_fifo_reset",
|
|
"implementation": "delayed_rwds_source_synchronous_capture",
|
|
"reset_behavior": "reset holds ck_o low, cs_n_o high, dq/rwds output enables low; future qualified PHY CDC must flush payload state before re-enable",
|
|
"relationship": "same_physical_source_logical_cdc"
|
|
}
|
|
]
|
|
}
|