mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-04 22:32:36 +00:00
- Updated to include support for the ICS55 PDK, allowing for conditional source inputs and configuration checks. - Added new test cases for the ICS55 platform, including PLL backend and GPIO readback functionality. - Modified existing tests to accommodate changes in configuration and source input handling. - Introduced new parameters in the testbench for better configurability. - Ensured compatibility checks for the IHP130 and ICS55 PDKs in the feasibility script. - Enhanced the publication tests to validate hardware changes more robustly.
106 lines
4.6 KiB
Tcl
106 lines
4.6 KiB
Tcl
# Copyright (c) 2022 ETH Zurich and University of Bologna.
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# Licensed under the Apache License, Version 2.0, see LICENSE for details.
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# SPDX-License-Identifier: Apache-2.0
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#
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# Authors:
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# - Philippe Sauter <phsauter@iis.ee.ethz.ch>
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#
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# -- Adaptable modifications are redistributed under compatible License --
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#
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# Copyright (c) 2023-2026 Yuchi Miao <miaoyuchi@ict.ac.cn>
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# retroSoC is licensed under Mulan PSL v2.
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# You can use this software according to the terms and conditions of the Mulan PSL v2.
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# You may obtain a copy of Mulan PSL v2 at:
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# http://license.coscl.org.cn/MulanPSL2
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# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
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# EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
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# MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
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# See the Mulan PSL v2 for more details.
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# get environment variables
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set root_dir [file normalize [file join [file dirname [info script]] ../../../../..]]
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puts "0. Executing init_tech: load technology from Github PDK"
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set have_sram_macro [expr {
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[info exists ::env(HAVE_SRAM_MACRO)] && $::env(HAVE_SRAM_MACRO) eq "YES"
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}]
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if {$pdk == "IHP130"} {
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set pdk_dir "$root_dir/physical/pdk/IHP-Open-PDK"
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set pdk_cells_lib ${pdk_dir}/ihp-sg13g2/libs.ref/sg13g2_stdcell/lib
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set pdk_sram_lib ${pdk_dir}/ihp-sg13g2/libs.ref/sg13g2_sram/lib
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set pdk_io_lib ${pdk_dir}/ihp-sg13g2/libs.ref/sg13g2_io/lib
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set tech_cells [list "$pdk_cells_lib/sg13g2_stdcell_typ_1p20V_25C.lib"]
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set tech_macros [list]
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if {$have_sram_macro} {
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set tech_macros [glob -nocomplain -directory $pdk_sram_lib *_typ_1p20V_25C.lib]
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}
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lappend tech_macros "$pdk_io_lib/sg13g2_io_typ_1p2V_3p3V_25C.lib"
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# for hilomap
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set tech_cell_tiehi {sg13g2_tiehi L_HI}
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set tech_cell_tielo {sg13g2_tielo L_LO}
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set abc_driver sg13g2_buf_4
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set abc_load 6.0
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} elseif {$pdk == "ICS55"} {
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set pdk_dir "$root_dir/physical/pdk/icsprout55-pdk"
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set pdk_cells_lib "$root_dir/.cache/retrosoc/pdk/ics55"
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set pdk_io_lib "${pdk_dir}/IP/IO/ICsprout_55LLULP1233_IO_251013/liberty"
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set tech_cells [list "$pdk_cells_lib/ics55_h7cr_tt.lib"]
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set tech_macros [list "$pdk_io_lib/ICSIOA_N55_3P3_tt_1p2_3p3_25c.lib"]
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if {$soc == "TINY"} {
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lappend tech_macros "$root_dir/.cache/retrosoc/sources/ics55_ecos_pll/lib/PLL_TOP_typ.lib"
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}
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if {$have_sram_macro} {
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lappend tech_macros "$pdk_cells_lib/sram/ics55_ecos_sram_1024x32_m8/lib/ics55_ecos_sram_1024x32_m8_tt1p2v25cctyp.lib"
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lappend tech_macros "$pdk_cells_lib/sram/ics55_ecos_sram_4096x32_m8/lib/ics55_ecos_sram_4096x32_m8_tt1p2v25cctyp.lib"
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}
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# for hilomap
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set tech_cell_tiehi {TIEHIH7R Z}
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set tech_cell_tielo {TIELOH7R Z}
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set abc_driver BUFX4H7R
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set abc_load 6.0
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} elseif {$pdk == "GF180"} {
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set pdk_sram_lib "$root_dir/physical/pdk/gf180mcu-pdk/macros/gf180mcu_fd_ip_sram/latest/cells/gf180mcu_fd_ip_sram__sram512x8m8wm1"
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set pdk_cells_lib "$root_dir/.cache/retrosoc/pdk/gf180"
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set tech_cells [list "$pdk_cells_lib/gf180mcu_fd_sc_mcu7t5v0__tt_025C_5v00.lib"]
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set tech_macros [list]
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if {$have_sram_macro} {
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lappend tech_macros "$pdk_sram_lib/gf180mcu_fd_ip_sram__sram512x8m8wm1__tt_025C_5v00.lib"
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}
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# The aggregate GF180 Liberty does not characterize the available tie cells.
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# Keep constants as logic instead of mapping them to an uncharacterized cell.
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set tech_cell_tiehi {}
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set tech_cell_tielo {}
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set abc_driver gf180mcu_fd_sc_mcu7t5v0__buf_4
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set abc_load 13.43
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} elseif {$pdk == "SKY130"} {
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set pdk_cells_lib "$root_dir/.cache/retrosoc/pdk/sky130"
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set pdk_sram_lib "$pdk_cells_lib/openram"
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set tech_cells [list "$pdk_cells_lib/sky130_fd_sc_hd__tt_025C_1v80.lib"]
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set tech_macros [list]
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if {$have_sram_macro} {
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lappend tech_macros "$pdk_sram_lib/sky130_sram_4kbyte_1rw_32x1024_8_TT_1p8V_25C.lib"
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}
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set tech_cell_tiehi {sky130_fd_sc_hd__conb_1 HI}
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set tech_cell_tielo {sky130_fd_sc_hd__conb_1 LO}
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set abc_driver sky130_fd_sc_hd__buf_1
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set abc_load 5
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} else {
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error "unsupported PDK for Yosys: $pdk"
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}
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# pre-formated for easier use in yosys commands
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# all liberty files
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set lib_list [concat [split $tech_cells] [split $tech_macros] ]
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set liberty_args_list [lmap lib $lib_list {concat "-liberty" $lib}]
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set liberty_args [concat {*}$liberty_args_list]
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# only the standard cells
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set tech_cells_args_list [lmap lib $tech_cells {concat "-liberty" $lib}]
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set tech_cells_args [concat {*}$tech_cells_args_list]
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# read library files
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foreach file $lib_list {
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yosys read_liberty -lib "$file"
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}
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