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retroSoC/docs/mini-soc-block-diagram.svg
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maksyuki e4e5546dbc feat: refactor UART and Timer Interfaces; Remove Unused Components
- Deleted the UART interface and related components from the RTL design, including the UART TX/RX signals and instances.
- Removed the timer interface and its associated files from the project, including the timer definitions and references in the integration files.
- Updated the APB target configurations to reflect the removal of the UART and timer components, ensuring the IRQ and memory map configurations are consistent.
- Adjusted the formal verification properties and testbenches to exclude references to the removed components.
- Cleaned up the integration documentation to accurately describe the current state of the system without the UART and timer interfaces.
2026-08-11 09:02:35 +08:00

59 KiB