mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-04 22:32:36 +00:00
- Deleted the UART interface and related components from the RTL design, including the UART TX/RX signals and instances. - Removed the timer interface and its associated files from the project, including the timer definitions and references in the integration files. - Updated the APB target configurations to reflect the removal of the UART and timer components, ensuring the IRQ and memory map configurations are consistent. - Adjusted the formal verification properties and testbenches to exclude references to the removed components. - Cleaned up the integration documentation to accurately describe the current state of the system without the UART and timer interfaces.
59 KiB
59 KiB