mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-05 06:32:37 +00:00
maksyuki
e77d7b3299
- Updated onchip_ram64_tb to increase ID_WIDTH from 6 to 7 and adjusted related write/read tasks. - Modified resource_controller_tb to accommodate an expanded resource count from 8 to 9, updating related logic signals. - Enhanced sysctrl_tb to introduce new fault handling logic for data plane faults, including additional fault validation and delivery mechanisms. - Added tests for clock and reset domains to ensure proper handling of data plane faults and their reset contracts. - Introduced new test_ga2d_platform.py to verify GA2D Phase 2 functionality, including lifecycle and recovery processes. - Updated test_soc_topology.py to ensure proper data master policies and validate GA2D integration within the system. - Enhanced sysctrl.py to ensure the fault master retains the high bit for data plane faults.
Mini SoC Integration
This directory is the active Mini SoC integration boundary.
- address_map contains the canonical address-map input and generator.
- core contains self-owned Mini core wrappers.
- dv contains behavioural testbench, device models, and Verilator harness sources.
- filelist contains canonical ordered .fl templates.
commonip.flis the full behavioral/synthesis Common source set;netlist_support.flis the explicit allowlist of testbench dependencies not already present in a synthesized netlist. - mk contains simulator and software make fragments.
- script contains filelist, address-map, conversion, and setup helpers.
- top contains SoC integration RTL, including
apb4_systemfor the APB4 platform block andapb4_periphfor the APB4 peripheral container.
Generated filelists, address-map products, and MPW output belong in the configured build variant, not under this directory.
Verilator normally retains the pin-level QSPI flash model. The explicit
--fast-flash emulator option replaces only the reset slot-0 0xEB read PHY
with a byte-wide DPI backend; unsupported slots, writes, or LUTs fail rather
than silently falling back. hp-linux-sim uses this mode so TCD, DMA, AXI,
XPI memory-map, CRC, SDRAM, HP release, and Linux userspace remain in the
acceptance path without spending hours shifting the boot payload over QSPI.
hp-smoke-sim remains the pin-level protocol reference.