mirror of
https://github.com/retroSoC/retroSoC.git
synced 2026-11-06 14:55:14 +00:00
maksyuki
f5b373fd65
- Added timestamp normalization to function in , allowing for optional timestamp input. - Updated command-line interface to accept a timestamp argument for generating deterministic build variant IDs. - Modified in to include a build timestamp in the environment variables. - Introduced a new test suite in to validate the pin-map generator, including tests for duplicate pads and invalid entries. - Added a test for ensuring the regression runner uses a consistent build timestamp. - Created a new SystemVerilog testbench for the APB4 interface bridge to verify correct signal crossing.
18 lines
380 B
Plaintext
18 lines
380 B
Plaintext
/top/apb4_if_bridge.sv
|
|
/top/gpio_pad_bridge.sv
|
|
/top/core_wrapper.sv
|
|
/top/retrosoc.sv
|
|
/top/retrosoc_asic.sv
|
|
/top/onchip_ram.sv
|
|
/top/ip_nmi_wrapper.sv
|
|
/top/ip_apb_wrapper.sv
|
|
/top/bus.sv
|
|
/top/rcu.sv
|
|
/top/mgmt_core_wrapper.sv
|
|
/top/user_core_design_template.sv
|
|
/top/user_core_top.sv
|
|
/top/user_core_wrapper.sv
|
|
/top/user_ip_design_template.sv
|
|
/top/user_ip_top.sv
|
|
/top/user_ip_wrapper.sv
|