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https://github.com/retroSoC/retroSoC.git
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maksyuki
f85ff59e33
- Introduced for comprehensive testing of the NPU vector module, covering bias preload, lane-masked accumulation, and fault conditions. - Created to implement differential tests for NPU compute-core RTL using Icarus Verilog and Verilator, ensuring bit-exact results against a numerical oracle. - Added to validate NPU memory and patch packer functionality, including SRAM models and various packing scenarios.
45 lines
1.9 KiB
Systemverilog
45 lines
1.9 KiB
Systemverilog
// Copyright (c) 2026 Yuchi Miao <miaoyuchi@ict.ac.cn>
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// SPDX-License-Identifier: MulanPSL-2.0
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package npu_pkg;
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// Frozen compute geometry: 8 output positions x 8 output channels dense,
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// eight depthwise lanes, one pipelined scalar requantizer.
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localparam int unsigned SpatialLanes = 8;
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localparam int unsigned ChannelLanes = 8;
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localparam int unsigned DenseMacCount = SpatialLanes * ChannelLanes;
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localparam int unsigned DepthwiseLanes = 8;
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localparam int unsigned MaxTilePositions = 8;
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localparam int unsigned MaxKSlice = 1024;
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// Sixteen 1024x32 banks = 64 KiB private storage, frozen partition map:
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// raw gather 0x0000..0x3fff, packed A 0x4000..0x7fff, packed W 0x8000..0xbfff,
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// output staging 0xc000..0xdfff, descriptor/parameter 0xe000..0xffff.
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localparam int unsigned BankCount = 16;
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localparam int unsigned BankAddrWidth = 10;
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localparam int unsigned BankBytes = 4096;
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localparam int unsigned LocalBytes = BankCount * BankBytes;
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localparam int unsigned RawBankFirst = 0;
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localparam int unsigned PackABankFirst = 4;
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localparam int unsigned PackWBankFirst = 8;
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localparam int unsigned OutBankFirst = 12;
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localparam int unsigned ParamBankFirst = 14;
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// Two accumulator contexts, each 8x8 checked INT32 sums.
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localparam int unsigned AccContextCount = 2;
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localparam int unsigned AccSumCount = DenseMacCount;
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// Numerical profile 1 widths: centered signed nine-bit activations,
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// signed eight-bit weights, signed 9x8 products, checked INT32 sums.
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localparam int unsigned CenteredWidth = 9;
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localparam int unsigned WeightWidth = 8;
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localparam int unsigned AccWidth = 32;
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localparam int unsigned ProductWidth = 17;
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typedef logic signed [CenteredWidth-1:0] centered_t;
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typedef logic signed [WeightWidth-1:0] weight_t;
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typedef logic signed [AccWidth-1:0] acc_t;
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typedef logic signed [ProductWidth-1:0] product_t;
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typedef enum logic [0:0] {
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PackDense,
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PackDepthwise
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} pack_mode_e;
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endpackage
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