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https://github.com/retroSoC/retroSoC.git
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maksyuki
fc6440989f
- Introduced to define the development environment and validate runtime/platform contracts. - Enhanced with to ensure change markers adhere to publication rules. - Updated to integrate boot acceptance checks and ensure dependencies are correctly managed. - Added tests for environment validation, publication change scope, and CI stages to prevent regression and ensure compliance with publication standards. - Implemented checks in to validate the presence of development environment dependencies. - Refactored existing tests to improve coverage and ensure accurate validation of publication claims and software configurations.
68 lines
3.8 KiB
Typst
68 lines
3.8 KiB
Typst
#import "../style.typ": *
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#change-start("v05-emphasis-register-index","Selected body emphasis: register index")
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#import "../ip-reference.typ": inline
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= Appendix: Global Register and Address Index <global-register-index>
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The index covers #data.system_reference.retrieval.register_index.definitions published
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register definitions through #data.system_reference.retrieval.register_index.rows instance
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rows. Repeated banks retain their address formula; together the rows describe
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#data.system_reference.retrieval.register_index.addresses address locations across the
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separate PRODUCT and selected MPW contexts. A shared definition can therefore appear at
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more than one instance base without creating another register ABI.
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Use the absolute address to identify a bank, then follow its register-name link for fields,
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side effects and software requirements. The offset column is *relative to that instance's
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base* for element zero, including the register-group base. An array row denotes
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#code("first address + n * stride") only for its printed index range; *gaps between elements
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are not additional registers*. All accesses shown are 32 bits, subject to the individual
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byte-strobe and permission rules in @register-programming.
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Reset text preserves fixed, conditional, dynamic and non-retained meanings from the detailed
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reference. It does not promise the value of a later live status read. Register addressability
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also *does not grant an initiator access* or establish that an optional feature is available.
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#let index = data.system_reference.retrieval.register_index
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#let bank-table(bank) = {
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// Keep the EXT-H bank boundary stable beside the preceding qualified EXT-L table.
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if bank.region=="APB4_EXT_H" {pagebreak(weak:true)}
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block(breakable:false,sticky:true)[
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#heading(level:3)[#bank.region]
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#text(9pt,fill:muted)[Base #code(bank.base_hex) · #bank.qualification]
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]
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{
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show underline: omit-link-underline
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ds-table("lookup-"+bank.id,[#bank.region register address index],
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([Offset],[Register / definition],[Absolute address / array],[Access],[Reset]),
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bank.rows.map(r=>(code(r.offset_hex),
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link(label(r.link),code((if r.group=="main" {r.name} else {r.group+"."+r.name}).replace("_","_\u{200b}"))),
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[#code(r.first_hex)#if r.count>1 {[
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#linebreak() + n × #code("0x"+str(r.stride,base:16))
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#linebreak() n = 0…#(r.count - 1)
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]}],r.access,inline(r.reset))),
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widths:(0.55fr,1.6fr,1.2fr,0.9fr,1.1fr))
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}
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}
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== PRODUCT Register Instances
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The reference profile resolves SRAM and other configuration-dependent fields before this
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index is generated. UART0/1, SDIO0/1, both timers and both I2C instances keep separate bases.
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GPIO user/management windows have separate decode coverage. SYSCTRL contains the RCU bank.
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FLASH, SRAM and external-memory data apertures are excluded from this register lookup.
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#for bank in index.instances.filter(b=>b.mode=="PRODUCT") {bank-table(bank)}
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== MPW Conditional Register Instances
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The following banks share the MPW user-IP aperture under different selections. They are not
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simultaneously active and are not PRODUCT peripherals. Confirm the MPW profile and selected
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design ID before interpreting this address range; see @mpw and @user-ip.
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#for bank in index.instances.filter(b=>b.mode=="MPW") {bank-table(bank)}
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The bank/offset/stride data are derived from the same publication register records as the
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individual chapters. Mapping, exclusions and instance qualifications are reviewed against
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the canonical topology and the selected register decoder.
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#source-note("publications/datasheets/register-profiles.json",title:"Shared register families and repeated-bank geometry")
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#source-note("publications/datasheets/system-reference.json",title:"Register-window mapping and reviewed instance qualifications")
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#change-end("v05-emphasis-register-index")
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