feat: add scripts and testbench files

.gitignore

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+build

Makefile

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+NOVAS        := /eda/tools/snps/verdi/R-2020.12/share/PLI/VCS/LINUX64
+EXTRA        := -P ${NOVAS}/novas.tab ${NOVAS}/pli.a
+
+VERDI_TOOL   := verdi
+SIM_TOOL     := vcs
+SIM_OPTIONS  := -full64 -debug_acc+all  +v2k -sverilog -timescale=1ns/10ps \
+                ${EXTRA} \
+                +error+500\
+                +define+SVA_OFF\
+                -work DEFAULT\
+                +vcs+flush+all \
+                +lint=TFIPC-L \
+                +define+S50 \
+                -kdb \
+
+SRC_FILE ?=
+SRC_FILE += ../rtl/apb4_timer.sv
+SRC_FILE += ../tb/timer_test.sv
+SRC_FILE += ../tb/test_top.sv
+SRC_FILE += ../tb/apb4_timer_tb.sv
+
+SIM_INC ?=
+SIM_INC += +incdir+../rtl/
+SIM_INC += +incdir+../../common/rtl/
+SIM_INC += +incdir+../../common/rtl/clkrst
+SIM_INC += +incdir+../../common/rtl/verif
+SIM_INC += +incdir+../../common/rtl/interface
+
+SIM_APP  ?= apb4_timer
+SIM_TOP  := $(SIM_APP)_tb
+
+WAVE_CFG ?= # WAVE_ON
+RUN_ARGS ?=
+RUN_ARGS += +${WAVE_CFG}
+RUN_ARGS += +WAVE_NAME=$(SIM_TOP).fsdb
+
+comp:
+	@mkdir -p build
+	cd build && (${SIM_TOOL} ${SIM_OPTIONS} -top $(SIM_TOP) -l compile.log $(SRC_FILE) $(SIM_INC))
+
+run: comp
+	cd build && ./simv -l run.log ${RUN_ARGS}
+
+wave:
+	${VERDI_TOOL} -ssf build/$(SIM_TOP).fsdb &
+
+clean :
+	rm -rf build
+
+.PHONY: wave clean

tb/apb4_timer_tb.sv

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+// Copyright (c) 2023 Beijing Institute of Open Source Chip
+// gpio is licensed under Mulan PSL v2.
+// You can use this software according to the terms and conditions of the Mulan PSL v2.
+// You may obtain a copy of Mulan PSL v2 at:
+//             http://license.coscl.org.cn/MulanPSL2
+// THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+// EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+// MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+// See the Mulan PSL v2 for more details.
+
+`include "apb4_if.sv"
+`include "timer_define.sv"
+
+module apb4_timer_tb ();
+  localparam CLK_PEROID = 10;
+  logic rst_n_i, clk_i;
+
+  initial begin
+    clk_i = 1'b0;
+    forever begin
+      #(CLK_PEROID / 2) clk_i <= ~clk_i;
+    end
+  end
+
+  task sim_reset(int delay);
+    rst_n_i = 1'b0;
+    repeat (delay) @(posedge clk_i);
+    #1 rst_n_i = 1'b1;
+  endtask
+
+  initial begin
+    sim_reset(40);
+  end
+
+  apb4_if u_apb4_if (
+      clk_i,
+      rst_n_i
+  );
+
+  test_top u_test_top (u_apb4_if);
+  apb4_timer u_apb4_timer (u_apb4_if);
+
+endmodule

tb/test_top.sv

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+// Copyright (c) 2023 Beijing Institute of Open Source Chip
+// gpio is licensed under Mulan PSL v2.
+// You can use this software according to the terms and conditions of the Mulan PSL v2.
+// You may obtain a copy of Mulan PSL v2 at:
+//             http://license.coscl.org.cn/MulanPSL2
+// THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+// EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+// MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+// See the Mulan PSL v2 for more details.
+
+`include "apb4_if.sv"
+`include "helper.sv"
+`include "timer_define.sv"
+
+program automatic test_top (
+    apb4_if.master apb4
+);
+
+  string wave_name = "default.fsdb";
+  task sim_config();
+    $timeformat(-9, 1, "ns", 10);
+    if ($test$plusargs("WAVE_ON")) begin
+      $value$plusargs("WAVE_NAME=%s", wave_name);
+      $fsdbDumpfile(wave_name);
+      $fsdbDumpvars("+all");
+    end
+  endtask
+
+  TimerTest timer_hdl;
+
+  initial begin
+    Helper::start_banner();
+    sim_config();
+    @(posedge apb4.presetn);
+    Helper::print("tb init done");
+    timer_hdl = new("timer_test", apb4);
+    // timer_hdl.init();
+    // timer_hdl.test_reset_reg();
+    // timer_hdl.test_wr_rd_reg();
+    // timer_hdl.test_irq();
+    Helper::end_banner();
+    #20000 $finish;
+  end
+
+endprogram

tb/timer_test.sv

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+// Copyright (c) 2023 Beijing Institute of Open Source Chip
+// gpio is licensed under Mulan PSL v2.
+// You can use this software according to the terms and conditions of the Mulan PSL v2.
+// You may obtain a copy of Mulan PSL v2 at:
+//             http://license.coscl.org.cn/MulanPSL2
+// THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND,
+// EITHER EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT,
+// MERCHANTABILITY OR FIT FOR A PARTICULAR PURPOSE.
+// See the Mulan PSL v2 for more details.
+
+`ifndef INC_TIMER_TEST_SV
+`define INC_TIMER_TEST_SV
+
+`include "apb4_master.sv"
+`include "timer_define.sv"
+
+class TimerTest extends APB4Master;
+  string                 name;
+  virtual apb4_if.master apb4;
+
+  extern function new(string name = "timer_test", virtual apb4_if.master apb4);
+  extern task automatic test_reset_reg();
+  extern task automatic test_wr_rd_reg(input bit [31:0] run_times = 1000);
+  extern task automatic test_irq(input bit [31:0] run_times = 1000);
+endclass
+
+function TimerTest::new(string name, virtual apb4_if.master apb4);
+  super.new("apb4_master", apb4);
+  this.name = name;
+  this.apb4 = apb4;
+endfunction
+
+task automatic TimerTest::test_reset_reg();
+  super.test_reset_reg();
+  // verilog_format: off
+  // this.rd_check(`GPIO_PADDIR_ADDR, "PADDIR REG", 32'b0 & this.gpio_mask, Helper::EQUL, Helper::INFO);
+  // this.rd_check(`GPIO_PADIN_ADDR, "PADIN REG", 32'b0 & this.gpio_mask, Helper::EQUL, Helper::INFO);
+  // this.rd_check(`GPIO_PADOUT_ADDR, "PADOUT REG", 32'b0 & this.gpio_mask, Helper::EQUL, Helper::INFO);
+  // verilog_format: on
+endtask
+
+task automatic TimerTest::test_wr_rd_reg(input bit [31:0] run_times = 1000);
+  super.test_wr_rd_reg();
+  // verilog_format: off
+  for (int i = 0; i < run_times; i++) begin
+    // this.wr_rd_check(`GPIO_PADDIR_ADDR, "PADDIR REG", $random & this.gpio_mask, Helper::EQUL);
+    // this.wr_rd_check(`GPIO_PADOUT_ADDR, "PADOUT REG", $random & this.gpio_mask, Helper::EQUL);
+    // this.wr_rd_check(`GPIO_INTEN_ADDR, "INTEN REG", $random & this.gpio_mask, Helper::EQUL);
+    // this.wr_rd_check(`GPIO_INTTYPE0_ADDR, "INTTYPE0 REG", $random & this.gpio_mask, Helper::EQUL);
+    // this.wr_rd_check(`GPIO_INTTYPE1_ADDR, "INTTYPE1 REG", $random & this.gpio_mask, Helper::EQUL);
+    // this.wr_rd_check(`GPIO_IOFCFG_ADDR, "IOFCFG REG", $random & this.gpio_mask, Helper::EQUL);
+  end
+  // verilog_format: on
+endtask
+
+`endif