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maksyuki
3b6a925a51
- Created documentation for , , , and modules, detailing their functionality, parameters, and usage examples. - Implemented a script to ensure required headings and content are present in documentation files. - Developed to generate and update documentation pages from SystemVerilog declarations, ensuring consistency and completeness.
67 lines
1.7 KiB
Markdown
67 lines
1.7 KiB
Markdown
# clock_or_tree
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| Property | Value |
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| --- | --- |
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| Kind | `module` |
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| RTL source | [`rtl/clock/clock_tree.sv`](../../../rtl/clock/clock_tree.sv) |
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| Availability | Synthesizable RTL |
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## Summary
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OR tree for clocks already proven safe to combine.
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## Functional Behavior
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OR tree for clocks already proven safe to combine. It implements the declared clock/reset behavior but does not replace physical clock-tree, reset-domain, or STA signoff.
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## Suitable Applications
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Use in controlled clock/reset infrastructure with explicit physical-design ownership.
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## Parameters
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The declaration below is canonical; retain the RTL-enforced parameter range.
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| Parameter | Declaration |
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| --- | --- |
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| `CLOCKS` | `parameter int CLOCKS = 2` |
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## Interface Definition
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```systemverilog
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module clock_or_tree #(
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parameter int CLOCKS = 2
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) (
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input logic [CLOCKS-1:0] clock_i,
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output logic clock_o
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);
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```
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### Port Summary
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| Signal | Direction | Declaration |
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| --- | --- | --- |
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| `clock_i` | `input` | `input logic [CLOCKS-1:0] clock_i` |
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| `clock_o` | `output` | `output logic clock_o` |
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## Integration and Use
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Respect all clock-running and configuration-stability assumptions. Do not use generic logic as a substitute for a safe clock-control cell.
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```systemverilog
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clock_or_tree #(
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.CLOCKS(CLOCKS)
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) u_clock_or_tree (
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.clock_i(clock_i),
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.clock_o(clock_o)
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);
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```
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## Dependencies and Verification
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The linked RTL source is the implementation authority and contains local assertions for unsupported
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parameter combinations. See [`docs/design.md`](../../design.md) for repository-wide CDC, reset,
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stream, and storage contracts, and [`docs/verification.md`](../../verification.md) for the
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verification matrix.
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